Dual-gate carrier stored IGBT device with P-type buried layer
A carrier storage and device technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems affecting device breakdown voltage and reduce device withstand voltage, so as to increase switching speed, increase breakdown voltage, and reduce electric field peak effect
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Embodiment 1
[0026] Such as figure 2 As shown, a double-gate carrier storage IGBT device with a P-type buried layer includes a collector metal 3, a first conductivity type semiconductor collector P+, and a second conductivity type semiconductor electric field stacked sequentially from bottom to top. The blocking region FS, the second conductivity type semiconductor drift region N-drift, the second conductivity type semiconductor drift region N-drift is provided with a trench gate structure, the second conductivity type semiconductor carrier storage region CS, the first conductivity type semiconductor The base region P-base, the second conductivity type semiconductor emission region N+, the first conductivity type semiconductor emission region P+, and the emitter metal 1 is arranged above the second conductivity type semiconductor drift region N-drift; the trench gate structure includes Two left and right control gates 4 and two left and right shielding gates 5 and the control gate structu...
Embodiment 2
[0037] Such as Image 6 As shown, the cell structure of a double-gate carrier storage layer bipolar transistor (CSTBT) with a P-type buried layer of the present invention is different from Embodiment 1 in that the depth of the shield gate 5 is greater than that of the control gate 4 Deeper. The effect of the shielding gate on reducing the gate-emitter capacitance (Cge) and the gate-collector capacitance (Cgc) is better.
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