A kind of semiconductor device and its manufacturing method, electronic device
A manufacturing method and semiconductor technology, which can be applied to semiconductor devices, electric solid-state devices, circuits, etc., can solve the problems of high voltage coupled with word lines, miswriting, etc., and achieve the effect of reducing the miswriting rate.
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Embodiment 1
[0043] The following will refer to Figure 3A ~ Figure 3H A method for fabricating a semiconductor device according to an embodiment of the present invention will be described in detail. In this embodiment, a NAND device is taken as an example to describe the manufacturing method of the semiconductor device in this embodiment.
[0044] First, if Figure 3A As shown, a semiconductor substrate 300 is provided, the semiconductor substrate 300 includes a storage area 300A and a peripheral area 300B, a gate dielectric layer 301 is formed on the semiconductor substrate, and memory cells and selectors are formed in the storage area 300A The gate SG, the memory cell includes a floating gate 302, an isolation layer 303 and a control gate 304 which are stacked in sequence. Exemplarily, the control gate 304 is electrically connected to the word lines WL1, WL2 and WL3 respectively. In the peripheral region 300B Forming the peripheral area gate gate, there is also a control gate hard mas...
Embodiment 2
[0081] The present invention also provides a semiconductor device, such as Figure 4 As shown, the semiconductor device includes: a semiconductor substrate 400, the semiconductor substrate 400 includes a storage area 400A and a peripheral area 400B, a gate dielectric layer 401 is formed on the semiconductor substrate, and a gate dielectric layer 401 is formed on the semiconductor substrate. A plurality of memory cells arranged at intervals and a selection gate are formed on the memory region 400A. The memory cells include a floating gate 402, an isolation layer 403 and a control gate 404 stacked in sequence, and are formed on the peripheral region 400B of the semiconductor substrate. There is a peripheral area gate; a silicide 405 is formed on the top of the storage unit, the selection gate, and the peripheral area gate; a spacer 406 is formed on the sidewall of the storage unit, the selection gate, and the peripheral area gate, The spacer 406 includes a first portion 4060 and...
Embodiment 3
[0088] Still another embodiment of the present invention provides an electronic device, including a semiconductor device and an electronic component connected to the semiconductor device. Wherein, the semiconductor device includes: a semiconductor substrate; a plurality of memory cells arranged at intervals on the semiconductor substrate, and the memory cells include floating gates, isolation layers and control gates which are stacked in sequence; A spacer on the side wall, the spacer includes a first part and a second part arranged in sequence along the stacking direction of the storage unit, the first part is closer to the storage unit than the second part in the stacking direction of the storage unit Said semiconductor substrate; an air gap and a filling space between spacers on two adjacent storage units, said air gap is at least surrounded by said first parts on two adjacent storage units, The filling interval is at least surrounded by the second parts on two adjacent sto...
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