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charge pump circuit

A charge pump and circuit technology, applied in the direction of electrical components, automatic power control, etc., can solve the problems of charge pump error, capacitor or resistor occupying a large chip area, charge injection effect, etc.

Active Publication Date: 2021-05-28
IPGOAL MICROELECTRONICS (SICHUAN) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, in the charge pump circuit of the prior art, when the switches M2 and M3 are turned off, the charges stored in their channels will be released to the two ends of the MOS transistors M2 and M3, and part of them will be injected into the capacitor C1 causes an error in the output voltage Vc of the charge pump, resulting in a charge injection effect; in addition, due to the existence of the drain parasitic capacitance of the MOS transistors M2 and M3, the signals Sw1 and Sw2 will be coupled to the node Vc through the drain parasitic capacitance, so that the charge pump The output voltage Vc produces an error, which produces a charge feedthrough effect; moreover, when the phase-locked loop system requires a smaller loop bandwidth, it is usually required that the charge pump adopts a larger capacitor C1 and resistor R1, but in the integrated circuit In the process, larger capacitors or resistors will occupy a large amount of chip area, increasing the manufacturing cost of the chip

Method used

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Embodiment Construction

[0019] Embodiments of the present invention will now be described with reference to the drawings, in which like reference numerals represent like elements. As mentioned above, the present invention provides a charge pump circuit. The charge pump circuit of the present invention eliminates the charge feedthrough effect and the charge injection effect, and further improves the accuracy of the output voltage.

[0020] Please refer to figure 2 , figure 2 It is a structural diagram of the charge pump circuit of the present invention. As shown in the figure, the charge pump circuit of the present invention is used in a phase-locked loop system, which includes a current generating unit and a canceling unit. The current generating unit includes a number of field effect transistors, two external switching signals sw1, sw2 and two bias The voltages vb1 and bv2 are input to the current generation unit, and the current generation unit generates charging and discharging currents for th...

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Abstract

The invention discloses a charge pump circuit, which is used in a phase-locked loop system. It particularly includes a current generating unit and a canceling unit. The current generating unit includes several field effect transistors, and two external switching signals and two bias voltages are input to the The current generation unit, the current generation unit generates a charging and discharging current for the charge pump according to the level of the two switch signals, and the elimination unit is connected with the current generation unit to connect the current generation unit The charge released by the field effect transistor is released to the ground. The charge pump circuit of the present invention eliminates the charge feedthrough effect and the charge injection effect, and further improves the accuracy of the output voltage.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a charge pump circuit that can be used in a phase-locked loop system. Background technique [0002] The charge pump circuit is one of the important components of the current mainstream analog phase-locked loop structure, and its existence can enable the phase-locked loop to simultaneously lock the frequency and phase. The structure of the charge pump circuit in the prior art is as figure 1 As shown, it is composed of P-type MOS transistors M1, M2, N-type MOS transistors M3, M4, resistor R1, and capacitor C1. The gates of MOS transistors M1 and M4 are respectively connected to fixed bias voltages Vb1 and Vb2, and the bias voltages Vb1 and Vb2 can usually be mirrored by a current mirror structure. They make MOS transistors M1 and M4 work in the saturation region and flow through the MOS transistors The drain currents of M1 and M2 are both a fixed value Icp, that is, the MOS tra...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03L7/089
CPCH03L7/0891
Inventor 何力
Owner IPGOAL MICROELECTRONICS (SICHUAN) CO LTD