A memory test system, method and storage medium

Abstract

The invention provides a test system and method for a memory, and a memory medium. The test system comprises a host computer, a configuration memory, a memory to be tested, a master FPGA and a verification FPGA. The host computer sends commands to the master FPGA to realize the selection, configuration and erasure operations of the memory to be tested. The master FPGA connects the memory to be tested to a serial port and the verification FPGA through the internal selection logic of the FPGA according to the requirements of the commands of the host computer, receives the level of the configuration completion pin DONE signal of the verification FPGA, and performs a reset operation on the verification FPGA. The configuration memory is used for configuring the master FPGA. The test system provided by the invention can meet the testing requirements of a memory circuit for FPGA configuration for long-time heat preservation in a low temperature environment, solves the problem that automatic test equipment has time limit and improves the test efficiency and accuracy of the configuration memory under the condition of testing at a low temperature for a long time.

Description

technical field [0001] The invention relates to a test system for a memory circuit configured with an SRAM FPGA and an implementation method thereof, especially for the test of the memory circuit in a low-temperature environment, and belongs to the technical field of integrated circuits. Background technique [0002] The SRAM-type FPGA determines its specific functions through the SRAM configuration bits all over the FPGA circuit. The bitstream set of these configuration bits is called bitstream. The memory circuit used for SRAM FPGA configuration is a rewritable, non-volatile online programmable memory circuit, which can store the FPGA configuration code stream in it to realize the functional configuration of the FPGA circuit. In the application system, it is generally used in conjunction with FPGA. [0003] The storage bank of the memory circuit used for SRAM FPGA configuration consists of multiple Flash modules to form a Flash array. Control and JTAG interface circuits ...

AI Technical Summary

Problems solved by technology

[0005] The technical problem solved by the present invention is: to overcome the problem of insufficient low-temperature test time in the existing test technology, and to provide a memory test system, method and storage medium. The system of the present invention can realize the high-coverage test of the FPGA configuration memory in a low-temperature environment, Solve the problem of insufficient holding time of automatic test equipment, improve the test accuracy and test efficiency of FPGA configuration memory circuits in low temperature tests

Images