Semiconductor structure and formation method thereof

Abstract

The invention relates to a semiconductor structure and a formation method thereof. The formation method includes the following steps that: a substrate is provided, gate structures are arranged on thesubstrate, source-drain doping regions located at two sides of each gate structure are formed in the substrate, an interlayer dielectric layer is formed on the substrate which is not covered by the gate structure, and the interlayer dielectric layer covers the tops of the gate structures; first contact openings exposing the source / drain doping regions are formed in the interlayer dielectric layerat two sides of each gate structure; second contact openings which pass through the interlayer dielectric layer above the gate structures are formed; after the second contact openings are formed, pre-amorphization implantation is performed on the source / drain doping regions; after the pre-amorphization implantation process, metal silicide layers are formed at the bottoms of the first contact openings; and after the metal silicide layers are formed, first contact hole plugs are formed in the first contact openings, and second contact hole plugs are formed in the second contact openings. With the formation method of the present invention adopted, amorphous layers formed at the bottoms of the first contact openings can be prevented from being oxidized during the formation of the second contact openings, and therefore, the problem that the metal silicide layers are difficult to form can be avoided.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the continuous development of integrated circuit manufacturing technology, the critical dimensions of devices are getting smaller and smaller, and many problems have arisen accordingly. For example, the contact resistance between the contact hole plug and the source-drain doped region increases, which leads to a decrease in the response speed of the semiconductor device, a delay in the signal, and a decrease in the driving current, thereby degrading the performance of the semiconductor device. In order to reduce the contact resistance between the contact hole plug and the source-drain doped region, a metal silicide process is introduced. The metal silicide has a lower resistivity and can significantly reduce the contact resistance, thereby increasing the driving current. [0003] With the con...

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Problems solved by technology

[0004] However, the electrical properties of the formed semiconductor structures still need to be improved

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