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Simulation method and system and wiring structure of DDR circuit

A simulation method and simulation system technology, applied in electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of reducing the signal quality of DDR circuits, discontinuous target impedance of signal links, affecting the signal integrity of DDR circuits, etc. , to achieve the effect of ensuring signal integrity, impedance continuity, and improving signal quality

Pending Publication Date: 2018-11-13
OPPO CHONGQING INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of this, the embodiment of the present application provides a simulation method, system and wiring structure of a DDR circuit to solve the problem that the target impedance of the signal link of the signal wiring layer is discontinuous in the wiring structure of the existing DDR circuit , which seriously affects the signal integrity of the DDR circuit, thus reducing the signal quality of the DDR circuit

Method used

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  • Simulation method and system and wiring structure of DDR circuit
  • Simulation method and system and wiring structure of DDR circuit
  • Simulation method and system and wiring structure of DDR circuit

Examples

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Embodiment 1

[0029] This embodiment provides a method for emulating a DDR circuit, which can be applied to any terminal device capable of running a DDR circuit emulation application or program, such as a PC (Personal Computer, personal computer) client, server, dedicated data processing device, etc. , and may also be a mobile terminal such as a mobile phone, a tablet computer, a personal digital assistant, or a notebook computer.

[0030] Such as figure 1 As shown, the simulation method of the DDR circuit provided in this embodiment includes:

[0031] Step S101 , performing layout and wiring design on the DDR circuit to obtain a wiring structure of the DDR circuit; wherein, the wiring structure includes a signal wiring layer and a reference plane.

[0032] In a specific application, before the layout and wiring design of the DDR circuit, it is necessary to determine the topology type and characteristic impedance value of the routing structure of the DDR circuit. The topology type includes...

Embodiment 2

[0063] This embodiment provides a DDR circuit emulation system for executing the method steps in Embodiment 1. The system may be a software program system in any terminal device capable of running a DDR circuit emulation application or program.

[0064] Such as figure 2 As shown, the simulation system 200 of the DDR circuit provided in this embodiment includes:

[0065] The layout and wiring design module 201 is configured to perform layout and layout design on the DDR circuit to obtain the wiring structure of the DDR circuit; wherein, the wiring structure includes a signal wiring layer and a reference plane;

[0066] An impedance value determination module 202, configured to determine a trace position in the signal trace layer whose impedance value is lower than a preset impedance threshold and an impedance value of the trace position;

[0067] A hollowed out area determination module 203, configured to determine the hollowed out area at the traced position of the reference...

Embodiment 3

[0085] Such as image 3 As shown, this embodiment provides a routing structure 300 of a DDR circuit implemented based on the simulation method of Embodiment 1 or the simulation system of Embodiment 2, which includes a signal routing layer 301 and a reference plane 302 .

[0086] In a specific application, the routing structure 300 may include two or more layers according to actual needs, and the specific number of layers may be designed according to actual layout and wiring needs. image 3 Only the parts related to this embodiment are shown in , and are not used to limit the actual implementation form of the wiring structure 300 .

[0087] Such as image 3 As shown, in this embodiment, a through hole 3021 with an area equal to the hollowed-out area is opened at the routing position 3011 of the reference plane 302;

[0088] The signal routing layer 301 has a via hole, and the routing position 3011 is the location of the via hole, that is, the routing position 3011 is the via ...

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Abstract

The invention is applicable to the field of DDR SDRAM technology and provides a simulation method and system and a wiring structure of a DDR circuit. The simulation method comprises the steps that layout wiring design is performed on the DDR circuit to obtain the wiring structure of the DDR circuit, wherein the wiring structure comprises a signal wiring layer and a reference plane; a wiring location with an impedance value lower than a preset impedance threshold in the signal wiring layer and the impedance value of the wiring location are determined; according to the impedance value of the wiring location, a hollow-out area at the wiring location of the reference plane is determined; and layout wiring design is performed on the DDR circuit again, and the wiring location of the reference plane is hollowed out according to the hollow-out area. Through the embodiment, target impedance of a signal link on the signal wiring layer can be continuous, so that the signal integrity of the DDR circuit is guaranteed, and the signal quality of the DDR circuit is improved.

Description

technical field [0001] The application belongs to the technical field of DDR (Double Data Rate, double data rate) SDRAM (Synchronous Dynamic Random Access Memory, Synchronous Dynamic Random Access Memory), and in particular relates to a simulation method, system and routing structure of a DDR circuit. Background technique [0002] DDR is the current mainstream memory specification, and the mainstream products of major chipset manufacturers can support the application of DDR. DDR memory has the characteristics of double-rate data transmission, data processing can be performed on the rising edge and falling edge of the clock signal, and the data transmission rate is twice that of SDR (Single Data Rate, single data rate) SDRAM. [0003] However, in the routing structure of the existing DDR circuit, the target impedance of the signal link of the signal routing layer is discontinuous, which seriously affects the signal integrity of the DDR circuit, thereby reducing the signal qua...

Claims

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F30/392
Inventor 姚坤
Owner OPPO CHONGQING INTELLIGENT TECH CO LTD
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