A low power lfsr reseeding test compression method for scan design

Abstract

The invention discloses a low power consumption LFSR reseeding test compression method facing scanning design structures. Thus, problems of excessive high test power consumption brought by a traditional LFSR reseeding technology can be solved. Based on an optimized coding algorithm of a test cube, the method can combine with any LFSR reseeding scheme, and be applied to industrial grade super-large-scale integrated circuits and the built-in self-testing of system on chips and functional verification thereof. The basic thinking of the method is as follows: random filling can be performed on don't care bits in the test cube during a LFSR reseeding process, which can trigger excessive high switch switching rates and test power consumption. The method can enhance the logic consistency between adjacent bits in the test cube by optimizing codes, so that test power consumption can be effectively reduced; and seed vector solving difficulty can be reduced by reducing the number of determined bits in the test cube and the number of state equations, so that test data compression rates can be effectively enhanced, and the challenges of testing storage resources can be alleviated.

Description

technical field [0001] The invention belongs to the technical field of very large scale integrated circuits (VLSI), and in particular relates to a scanning design-oriented low-power LFSR reseeding test compression method. Background technique [0002] As microelectronics technology and semiconductor technology enter the era of deep submicron systems, the process size of VLSI is shrinking and the clock frequency is increasing, chip testing is facing more and more challenges. Among them, the increasing data volume and excessive test power consumption are the main problems now. Therefore, many test compression schemes have been proposed to reduce test storage and bandwidth. Existing test data compression techniques mainly include encoding compression, broadcast scan compression and compression based on linear decompression structure. Compared with the first two methods, LFSR-based reseeding technology is adopted by most commercial tools because of its high test compression rat...

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a low-power consumption LFSR reseeding test compression method for scan design, aiming at the excessively frequent switching activities during the scanning process of the test pattern generated in the LFSR seeding process, resulting in high test power consumption , perform low-power optimized block encoding on the test cube generated by ATPG, and establish a state transition equation system based on this, and use Gaussian Jordan elimination to solve the LFSR seed vector

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