A kind of sonos storage structure and its manufacturing method

Abstract

The invention provides a SONOS storage structure and a manufacturing method thereof. The SONOS storage structure includes a substrate and a selection transistor gate and a storage transistor gate formed on the substrate, wherein the substrate is a composite substrate including a silicon base Layer, buried oxide layer and silicon surface layer, the upper part of the silicon base layer is the storage tube well region; the selection tube grid and the storage tube grid are formed on the silicon surface layer; the selection tube grid includes the first grid of the selection tube and the first grid of the selection tube. The second grid of the selection transistor, the first grid of the selection transistor and the second grid of the selection transistor are respectively located on both sides of the grid of the storage tube, and are electrically isolated from the grid of the storage tube by the first sidewalls on both sides of the grid of the storage tube and a silicon epitaxial layer adjacent to the first gate of the selection transistor and the second gate of the selection transistor is respectively formed on the upper surface of the silicon surface layer outside the first gate of the selection transistor and the second gate of the selection transistor. The manufacturing method provided by the present invention is compatible with the existing FDSOI process, and can manufacture the above-mentioned SONOS storage unit with smaller structure and better performance.

Description

technical field [0001] The invention relates to the field of semiconductor devices and manufacturing thereof, in particular designing a SONOS storage structure and a manufacturing method thereof. Background technique [0002] Since the early days when Dr. Jack Kilby of Texas Instruments invented the integrated circuit, scientists and engineers have made numerous inventions and improvements in semiconductor devices and processes. Over the past 50 years, there has been a significant reduction in the size of semiconductors, which translates into ever-increasing processing speeds and ever-decreasing power consumption. So far, the development of semiconductors has roughly followed Moore's Law, which roughly states that the number of transistors in a dense integrated circuit doubles about every two years. Now, the semiconductor process is developing below 20nm, and some companies are working on the 14nm process. Here is just a reference, a silicon atom is about 0.2nm, which mean...

AI Technical Summary

Problems solved by technology

As the size of VLSI continues to shrink, the limitations on manufacturing process and material properties are becoming more and more significant, making it more and more difficult to reduce the size of planar transistors

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