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Semiconductor-on-insulator device structure and method of forming the same

A device structure, semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve the problems of device performance degradation, abnormal MOS tube output curve, and effective connection formation, so as to prevent the degradation of device performance , avoid self-heating effect, reduce the effect of series resistance

Active Publication Date: 2019-03-29
上海微阱电子科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But since the device is fully isolated, figure 1 The body region 14 of the NMOS and PMOS in the system cannot be effectively connected to the power supply or ground, forming the so-called floating body effect
Although the floating body effect can be improved through the device layout, due to the large resistance of the body region 14, the floating body effect will still appear when the body contact region is far away from the channel region, resulting in an abnormal output curve of the MOS transistor
At the same time, the thermal conductivity of the silicon dioxide 12 below the body region 14 is poor, which causes the self-heating effect of the device, reduces the carrier mobility of the device, and degrades the performance of the device.
In addition, the preparation process of SOI silicon wafer is complicated and the manufacturing cost is high

Method used

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  • Semiconductor-on-insulator device structure and method of forming the same
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  • Semiconductor-on-insulator device structure and method of forming the same

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Embodiment Construction

[0039] The specific embodiment of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0040] It should be noted that, in the following specific embodiments, when describing the embodiments of the present invention in detail, in order to clearly show the structure of the present invention for the convenience of description, the structures in the drawings are not drawn according to the general scale, and are drawn Partial magnification, deformation and simplification are included, therefore, it should be avoided to be interpreted as a limitation of the present invention.

[0041] In the following specific embodiments of the present invention, please refer to figure 2 , figure 2 It is a schematic diagram of a semiconductor-on-insulator device structure according to a preferred embodiment of the present invention. Such as figure 2 As shown, a semiconductor-on-insulator device structure of the present invention includ...

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Abstract

The invention discloses a semiconductor-on-insulator device structure and a forming method. A conventional semiconductor substrate is used, and a semiconductor device is manufactured through an epitaxial process, a conventional semiconductor process, a stacking process, a back groove process and a back metallization process. An NMOS device and a PMOS device can be manufactured without using an SOIsubstrate. Back grooves are connected with shallow grooves, so that complete dielectric isolation between the devices is realized. An N-type reverse expansion layer and a P-type reverse expansion layer are heavily doped and form effective ohmic contact with a back contact hole, so that the P well body region of the NMOS is grounded, the N well body region of the PMOS is connected with a power supply, the series resistance of the body contact is reduced, and the floating body effect of an SOI device is avoided. Moreover, heat generated in the device body region can be rapidly conducted out through the body region, the back expansion layer, the back contact hole and a back metal layer, which are connected. The self-heating effect is avoided, and the performance of the device is prevented from being degraded.

Description

technical field [0001] The present invention relates to the technical field of semiconductor processing, and more particularly, to a semiconductor-on-insulator device structure and forming method. Background technique [0002] For half a century, the semiconductor industry has followed Moore's Law to shrink transistor size, increase transistor density, and improve performance step by step. However, as the size of bulk silicon transistor devices with planar structure is getting closer to the physical limit, Moore's law is getting closer to its end; therefore, some new structures of semiconductor devices called "non-classical CMOS" have been proposed. These technologies include FinFET, carbon nanotubes and silicon on insulator (silicon oninsulator, SOI) and so on. Through these new structures, the performance of semiconductor devices can be further improved. [0003] Among them, SOI technology has attracted widespread attention due to its simple process and superior performa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12H01L21/762H01L21/683
CPCH01L21/6835H01L21/7624H01L27/1203H01L2221/6835
Inventor 顾学强
Owner 上海微阱电子科技有限公司
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