A method for acquiring a phase detection signal in a clock recovery circuit and a phase detection device

Abstract

Embodiments of the present application provide a method for acquiring a phase detection signal in a clock recovery circuit and a phase detector for obtaining a correct phase detection signal. The technical solution provided by the embodiment of the present application is as follows: the phase detector receives the sampling sequence sent by the analog-to-digital converter ADC, and the sampling sequence is obtained by the ADC sampling the electrical signal received by the ADC according to the actual sampling rate, and the electrical signal carries a pre-configured The training sequence; the phase detector correlates the sampling sequence with the comparison sequence to determine the first position and the second position, the first position and the second position are the positions of the starting point of the training sequence in the sampling sequence , the difference between the first position and the second position in the starting point of the sampling sequence is a positive integer number of training sequence periods, and the comparison sequence is generated by the phase detector according to the training sequence and the target sampling rate of the ADC; the discrimination sequence The phase detector obtains a phase detection signal according to the difference parameter between the first position and the second position.

Description

technical field [0001] The embodiments of the present application relate to the communication field, and in particular to a method for acquiring a phase detection signal in a clock recovery circuit and a phase detector. Background technique [0002] In a coherent optical communication system, after the receiver completes the photoelectric conversion, it needs to convert the analog electrical signal into a digital signal through an analog-to-digital converter (English full name: Analog to Digital Converter, referred to as ADC) for subsequent algorithm processing in the digital domain. . The clock recovery circuit is a key module to ensure that the rate at which the ADC converts the analog signal into a digital signal corresponds to the rate at which the transmitter sends the signal. In the clock recovery circuit, the deviation of the current sampling rate relative to the target sampling rate is judged by the phase detector, and the actual sampling rate of the ADC is adjusted...

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Problems solved by technology

[0004] In coherent optical communication, the waveform of the signal is affected by factors such as random polarization rotation in the optical fiber, polarization-dependent loss, polarization mode dispersion, chromatic dispersion, channel bandwidth impairment, frequency offset of the transceiver laser, etc., resulting in the conventional phase detector based on the waveform The calculated phase detection signal has a large error

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