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Manufacturing method of semiconductor device, and semiconductor device

A manufacturing method and semiconductor technology, applied to semiconductor devices, electrical components, circuits, etc., can solve the problem of high cost of semiconductor devices with small-width openings, achieve controllable deposition thickness accuracy, low equipment prices, and reduce equipment requirements and costs.

Inactive Publication Date: 2019-07-23
福建省福联集成电路有限公司
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  • Abstract
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  • Application Information

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Problems solved by technology

[0007] For this reason, it is necessary to provide a semiconductor device manufacturing method and a semiconductor device to solve the problem of high cost of manufacturing small-width opening semiconductor devices using E-Beam equipment and DUV equipment

Method used

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  • Manufacturing method of semiconductor device, and semiconductor device
  • Manufacturing method of semiconductor device, and semiconductor device
  • Manufacturing method of semiconductor device, and semiconductor device

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Embodiment Construction

[0031] In order to explain in detail the technical content, structural features, achieved goals and effects of the technical solution, the following will be described in detail in conjunction with specific embodiments and accompanying drawings.

[0032] see Figure 1 to Figure 6 , first explain the English abbreviations that may appear in this embodiment and the accompanying drawings:

[0033] 1.ND1: 1stNitrideDeposition: the first layer of nitride deposition

[0034] 2.NP1: 1stNitridePhoto: The first layer of nitride etching window yellow photolithography process

[0035] 3.NE1: 1stNitrideEtch: the first layer of nitride etching

[0036] 4.ND2: 2ndNitrideDeposition: The second layer of nitride deposition

[0037] 5.NE2: 2ndNitrideEtch: The first layer of nitride etching

[0038] 6. TGB: TGateBottomDevelop: T-type gate bottom photolithography process

[0039] 7. TGT: TGateTopDevelop: T-type gate top photolithography process

[0040] 8. TGD: TGateDeposition: T-type gate d...

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Abstract

The invention discloses a manufacturing method of a semiconductor device, and the semiconductor device. The method comprises the steps of covering a substrate of the semiconductor device with a firstlayer of nitride; defining an etching window in a position to be opened; etching the first layer of the nitride, and forming a groove in the position to be opened; covering the first layer of the nitride and the groove with a second layer of nitride; and performing dry etching to remove the second layer of the nitride covering the bottoms of the first layer of the nitride and the groove, and leaving the second layer of the nitride on the side walls of the groove. According to the technical scheme, a relatively large opening is formed in the first layer of the nitride firstly, and then the opening is filled by depositing the second layer of the nitride, so that a small-width opening is realized. Due to the fact that the deposition thickness precision of the nitride layer is controllable, the equipment price is relatively low, and the price of equipment for forming the relatively large opening in the nitride is relatively low, the relatively low-cost equipment can be used for forming therelatively small opening in the nitride, so that the equipment requirements and cost are reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a semiconductor device and a semiconductor device. Background technique [0002] At present, in the production process of small-width T-shaped gates (such as 0.15um) in the manufacturing process of GaAs (gallium arsenide) compound semiconductors, E-Beam electron beams and DUV alignment equipment are used to expose the photoresist to directly reach the T-shaped grid. The bottom structure of the gate has a line width of 0.15um, and then the top structure groove of the T-shaped gate is formed and metal is evaporated to form a metal contact of the 0.15um T-shaped gate. [0003] The above-mentioned method of exposing the photoresist by using E-Beam electron beams has the following disadvantages: [0004] Disadvantage 1: Because the shape structure of T-Gate is wide at the top and narrow at the bottom, this solution must first expose and ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L29/423
CPCH01L29/401H01L29/423
Inventor 林豪王潮斌陈东仰詹智梅肖俊鹏郑育新林张鸿林伟铭
Owner 福建省福联集成电路有限公司
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