A high-speed dynamic comparator and successive approximation analog-to-digital converter and electronic equipment

A dynamic comparator, successive approximation type technology, applied in the direction of analog/digital conversion, code conversion, instruments, etc. Low power consumption, noise suppression, and less capacitance repetition

Active Publication Date: 2022-04-19
NO 24 RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of the above-mentioned shortcoming of prior art, the purpose of the present invention is to provide a kind of high-speed dynamic comparator and successive approximation analog-to-digital converter and electronic equipment, be used to solve the problem that existing dynamic comparator power consumption and speed are not compatible , especially to solve the problem of dynamic comparator power consumption

Method used

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  • A high-speed dynamic comparator and successive approximation analog-to-digital converter and electronic equipment
  • A high-speed dynamic comparator and successive approximation analog-to-digital converter and electronic equipment
  • A high-speed dynamic comparator and successive approximation analog-to-digital converter and electronic equipment

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Embodiment Construction

[0029] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, in the case of no conflict, the following embodiments and features in the embodiments can be combined with each other.

[0030] Based on the analysis of the background technology, the present invention proposes a high-speed dynamic comparator. Compared with the traditional structure, the dynamic comparator can flexibly adjust its own working state according to the difference of the input signal, so that it can op...

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Abstract

The invention discloses a high-speed dynamic comparator, which includes an input NMOS transistor M1 / M2, a latch structure composed of an NMOS transistor M4 / M5 and a PMOS transistor M7 / M8, and a reset control device composed of an NMOS transistor M6 and a PMOS transistor M9. The switch is a pull-down tube composed of NMOS tubes M3 / M10 / M11; it also includes inverters I0 / I1 / I2, delay units d1 / d2, AND gates AND1 / AND2, and XNOR gates; the present invention controls M10 and M11 sequentially turn off the sequence to make tip and tin turn on at the same time to form high-speed mode and low-speed mode, and then the conduction current increases, and then enters the latch state first, so that the noise can be effectively suppressed. In addition, the High-speed dynamic comparators realize a wide range of applications in existing successive-approximation analog-to-digital converters and electronic equipment.

Description

technical field [0001] The invention relates to the technical field of analog or digital-analog hybrid integrated circuits, in particular to a high-speed, low-power noise suppression dynamic comparator. Background technique [0002] In recent years, there has been increasing research on successive approximation analog-to-digital converters (SAR ADCs), which can provide very low power consumption and consume a small area since no operational amplifier is required. Because SAR ADC needs to provide very fast working speed and very small internal power consumption, so, the design of the dynamic comparator becomes the important bottleneck technology of SAR ADC. With the continuous development of integrated circuit manufacturing technology, the feature size of CMOS devices is continuously reduced, and the operating voltage of integrated circuits is also continuously reduced. Under the deep submicron technology, the working speed of analog-to-digital converters has been greatly imp...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/46H03M1/00H03M1/08
CPCH03M1/462H03M1/002H03M1/08
Inventor 徐代果徐世六陈光炳刘涛刘璐邓民明石寒夫王旭
Owner NO 24 RES INST OF CETC
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