Multi-level storage reading and writing method and system for phase change memory

A phase-change memory and multi-level storage technology, which is applied in the storage field, can solve problems such as data read errors, and achieve the effects of facilitating error detection and correction, improving reliability, and reducing difficulty

Active Publication Date: 2021-04-02
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When the phase-change memory performs multi-value storage, the generation of resistance drift will cause the resistance value of the intermediate state to overlap with other adjacent resistance states, resulting in data read errors

Method used

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  • Multi-level storage reading and writing method and system for phase change memory
  • Multi-level storage reading and writing method and system for phase change memory
  • Multi-level storage reading and writing method and system for phase change memory

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Embodiment 1

[0064] Such as figure 2 As shown, this embodiment provides a multi-level storage system 1 of a phase change memory, and the multi-level storage system 1 of the phase change memory includes:

[0065] A data storage module 11 , a reference module 12 and a readout function module 13 .

[0066] Such as figure 2 As shown, the data storage module 11 includes a plurality of data units d for storing data.

[0067] Specifically, in this embodiment, the data unit d adopts a 2T2R structure, which can effectively improve the device's immunity to process fluctuations and reliability of information storage. Such as image 3 As shown, the data unit d includes two phase-change memory elements, the first phase-change memory element includes a first switch T1 and a first phase-change resistor R1, one end of the first switch T1 is grounded, and the other end is connected to the first A phase-change resistor R1, the control end of the first switch T1 is connected to a row of scanning signal...

Embodiment 2

[0090] Such as Figure 2 to Figure 6 As shown, this embodiment provides a multi-level storage reading and writing method of a phase change memory, which specifically includes:

[0091] Such as Figure 2 ~ Figure 3 As shown, the write operation steps of phase change memory:

[0092] The data unit to be written and its corresponding reference unit are selected, the stored data is written in the selected data unit, and the reference signal corresponding to the stored data is written in the selected reference unit.

[0093] Specifically, in this embodiment, the multi-level storage reading and writing method of the phase change memory is implemented based on the multi-level storage system of the phase change memory in the first embodiment. In actual use, any device that can realize this method is applicable . In this embodiment, the first phase-change storage element in the data unit d that needs to be written is selected by the row-column decoder 15, and the first phase-change ...

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Abstract

The invention provides a multistage storage read-write method and system for a phase change memory, and the system comprises a data storage module which comprises a plurality of data units for storingdata; a reference module which comprises a plurality of reference units, wherein 2k-1 reference unit corresponds to one data unit and are used for storing a reference signal corresponding to the stored data, and k is a stored data bit; and a reading function module which reads the reference signal corresponding to a certain data unit when reading the data unit, and restores the data stored in thedata unit. According to the invention, a 2T2R structure is used as a basic unit for data storage, the influence caused by resistance drift is reduced to a certain extent through the combination of different resistances of the two phase change storage elements, and high-density storage is realized; an error detection and correction function is set, and the reliability of multi-value storage of thephase change memory is improved through error detection and correction; a reference unit is arranged, the stored data is calculated and restored through the reference unit, and high-reliability reading is achieved; meanwhile, the difficulty of error detection and correction is reduced, and the reliability is further improved.

Description

technical field [0001] The invention relates to the storage field, in particular to a multi-level storage read-write method and system of a phase-change memory. Background technique [0002] With the continuous popularization and application of electronic equipment, the status of memory in the semiconductor market is also increasing. At present, the two mainstream memories are mainly divided into two categories: volatile memory represented by Random Access Memory (RAM) and non-volatile memory represented by Flash Memory (Flash Memory). According to Moore's law, the feature size of the device is continuously decreasing. With the decrease of the feature size of the flash memory, when the feature size is reduced to 45nm, the performance of the device drops rapidly, and the advantage of multi-valued storage no longer appears. As the feature size shrinks below the 28nm node, flash memories experience process compatibility issues. [0003] The current development trend of memory...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/10G11C16/26G11C29/42G11C29/44
CPCG11C16/10G11C16/26G11C29/42G11C29/44
Inventor 吕艺陈后鹏王倩李喜雷宇郭家树解晨晨苗杰宋志棠
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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