9t TFET and MOSFET Hybrid SRAM Cell Circuit with High Write Margin

Abstract

The invention discloses a 9T TFET and MOSFET device hybrid SRAM unit circuit with a high write margin. The overall structure of the unit adopts a read-write separation method. The main body of the unit circuit adopts a TFET device, and the transmission tube part adopts a TFET device. Combining with MOSFET devices not only overcomes the shortcoming of the weak transfer capability of stacked TFETs, but also avoids the P-I-N forward bias current problem that occurs when TFET devices are used as SRAM unit transfer tubes. The write ability of the unit is improved, and the static power consumption of the unit is reduced.

Description

technical field [0001] The invention relates to the technical field of integrated circuit design, in particular to a 9T TFET and MOSFET device hybrid SRAM cell circuit with high write margin. Background technique [0002] With the development of mobile electronic products, people's demand for low power consumption of integrated circuits has become more and more urgent. In recent years, MOSFET (Metal-Oxide Semiconductor Field Effect Crystal) has become an important part of digital integrated circuits and analog integrated circuits. However, with the development of integrated circuit technology nodes, the size of MOSFETs is gradually reduced. Due to the short channel effect of MOSFETs, their ability to turn off at sub-threshold voltages is weakened, resulting in increased static leakage current and static power consumption of the circuit. In microprocessors, static random access memory (SRAM) occupies more than 50% of the chip area and consumes most of the static power consum...

AI Technical Summary

Problems solved by technology

Although this structure perfectly solves the problem of the P-I-N forward bias current of TFETs, stacking TFETs leads to very weak writing ability of the cells, and the cells cannot even be successfully written in the smallest size.

In order to realize the write function, the size of the transmission tube must be increased, resulting in an increase in unit area and an increase in chip cost

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