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Memory and writing method and reading method thereof

A memory and storage unit technology, applied in the storage field, can solve the problem that the memory is difficult to achieve high-density storage units, and achieve the effect of high-density storage

Inactive Publication Date: 2020-01-07
CETHIK GRP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The main purpose of this application is to provide a memory, its writing method and reading method, so as to solve the problem that it is difficult to realize high-density memory cells in the memory in the prior art

Method used

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  • Memory and writing method and reading method thereof
  • Memory and writing method and reading method thereof
  • Memory and writing method and reading method thereof

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0062] Such as Figure 4As shown, the memory includes a plurality of memory cells, each of which includes a MOS transistor, three MTJs connected in series, a bit line, a word line, a source line, and a protector. For the specific connection relationship, see Figure 4 shown. Among them, the structure of each MTJ is the same, such as Figure 5 As shown, all of them include a fixed layer 201 , a barrier layer 202 and a free layer 203 stacked in sequence from bottom to top.

[0063] The thickness of the barrier layer of the three MTJs, the product of the resistance area, the write current density, the tunnel magnetoresistance ratio TMR and other parameters are all equal. The breakdown voltage of each MTJ is only related to the thickness and quality of the barrier layer MgO, so they are roughly equal.

[0064] Since the magnitude of the write current is proportional to the area of ​​the MTJ, the magnitude of the write current corresponding to each MTJ can be well controlled by ...

Embodiment 2

[0083] The structure of the memory is the same as that of the memory in Embodiment 1, except that the memory has four storage states, and the resistances of the corresponding states are shown in Table 4.

[0084] Table 4

[0085]

[0086]

[0087] The memory read process see Figure 7 As shown, specifically, the reading process includes: first, judging whether the read resistance is greater than 24.5kOhm, when it is greater, the first bit (highest bit) is 0, and when it is less than, the first bit is 1;

[0088] When the first bit is 0, compare the read voltage with a second reference voltage, and the second reference voltage is greater than the first reference voltage, that is, select 32kOhm to compare with the read voltage, when the read voltage is greater than the second When the reference voltage is set, the second bit is 0, read 00, and when it is less than, read 01;

[0089] When the first bit is 1, compare the read voltage with a second reference voltage that is...

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Abstract

The invention provides a memory and a writing method and a reading method thereof. The memory comprises a plurality of memory units, each storage unit comprises an MOS tube, N MTJs connected in series, a bit line, a word line and a source line. The N MTJs are arranged on the surface of the MOS tube and are sequentially arranged in an overlapped mode in the direction away from the MOS tube. In theN MTJs, the MTJ with the smallest distance from the MOS tube is a bottom end MTJ; wherein the MTJ with the largest distance from the MOS tube is the top end MTJ, one end of the bottom end MTJ is electrically connected with one of the source electrode and the drain electrode of the MOS tube, the source line is electrically connected with the other one of the source electrode and the drain electrode, one end of the top end MTJ is electrically connected with the bit line, the grid electrode of the MOS tube is electrically connected with the word line, N >=2 and N is an integer. The storage unit of the memory can store more information under the same area, and high-density storage can be realized.

Description

technical field [0001] The present application relates to the storage field, in particular, to a memory, its writing method and reading method. Background technique [0002] MTJ (Magnetic Tunnel Junction): Based on the magnetic tunnel magnetoresistance (TMR) effect, it consists of two magnetic layers and a dielectric layer between the two magnetic layers. The two magnetic layers are the first magnetic layer and the second magnetic layer. , where the magnetization orientation of the first magnetic layer is fixed, called a pinned layer; the magnetization orientation of the second magnetic layer can be changed by a magnetic field or an electric current, called a free layer. By adjusting the magnetization orientation of the free layer, the two magnetic layers are in the Parallel state or antiparallel state, corresponding to high resistance state (corresponding to resistance R ap , logic state is 0) and low resistance state (corresponding to resistance R p , logic state is 1), ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/404
CPCG11C11/404
Inventor 熊保玉何世坤刘少鹏
Owner CETHIK GRP
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