Digital alloy based back barrier for p-channel nitride transistors

Abstract

A III-nitride power handling device and the process of making the III-nitride power handling device are disclosed that use digital alloys as back barrier layer to mitigate the strain due to lattice mismatch between the channel layer and the back barrier layer and to provide increased channel conductivity. An embodiment discloses a GaN transistor using a superlattice binary digital alloy as back barrier comprising alternative layers of AlN and GaN. Other embodiments include using superlattice structures with layers of GaN and AlGaN as well as structures using AlGaN/AlGaN stackups that have different Aluminum concentrations. The disclosed device has substantially increased channel conductivity compared to traditional analog alloy back barrier devices.

Description

technical field [0001] The present invention relates generally to the field of III-nitride transistors, and more particularly to the design and fabrication of P-channel GaN transistors. Background technique [0002] GaN power integrated circuits (ICs) have the potential to significantly reduce the size and weight of power electronic systems, thereby significantly reducing the cost of power electronics. P-channel GaN transistors are key components in the fabrication of GaN power ICs. Such power electronics systems are widely required in electric / hybrid vehicles, more electric aircraft, and many consumer electronics. [0003] A variety of GaN transistors are known, and they include P-channel transistors as well as N-channel transistors that use analog alloys to improve conductivity. The use of ternary alloys such as AlGaN (aluminum gallium nitride) is commonly referred to in the art as analog alloys. To increase the power handling capability of GaN transistors, several tech...

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However, thick simulated AlGaN with high Al content

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