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Shallow trench isolation structure and manufacturing method thereof

A technology of isolation structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of forming voids and affecting the isolation performance of shallow trench isolation structures, and achieve the effect of improving performance and filling quality

Pending Publication Date: 2020-06-02
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a shallow trench isolation structure and its manufacturing method, which are used to solve the problem of the formation of cavities inside during the deposition of the insulating layer in the prior art, thereby affecting the shallow trench isolation structure. The problem of the isolation performance of the trench isolation structure

Method used

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  • Shallow trench isolation structure and manufacturing method thereof
  • Shallow trench isolation structure and manufacturing method thereof
  • Shallow trench isolation structure and manufacturing method thereof

Examples

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Embodiment 1

[0046] Such as Figure 1 to Figure 12 As shown, this embodiment provides a method for manufacturing a shallow trench isolation structure, and the method includes the following steps:

[0047] Such as Figure 1 to Figure 5 As shown, step 1) is first performed, providing a substrate 101, the oxide protection layer 102 is formed on the surface of the substrate 101, and the oxide protection layer 102 and the substrate 101 are patterned and etched, so that the A first trench 105 is formed in the substrate 101 .

[0048] The substrate 101 can be a silicon substrate, a silicon germanium substrate, a silicon carbide substrate, a germanium substrate, etc., and can be doped or undoped. For example, the substrate 101 can be P-type doped Silicon substrate or N-type doped silicon substrate, etc.

[0049] Such as figure 1 As shown, in this example, an oxide protection layer 102 is formed on the surface of the substrate 101, and the oxide protection layer 102 can protect the surface of t...

Embodiment 2

[0066] Such as Figure 12 As shown, this embodiment provides a shallow trench isolation structure, and the shallow trench isolation structure includes a substrate 101 , a first isolation layer 107 and a second isolation layer.

[0067] Such as Figure 12 As shown, the substrate 101 can be a silicon substrate, a silicon germanium substrate, a silicon carbide substrate, a germanium substrate, etc., and can be doped or undoped. For example, the substrate 101 can be P Type doped silicon substrate 101 or N type doped silicon substrate, etc.

[0068] There is a first trench 105 in the substrate 101, and the shallow trench isolation structure further includes an oxide liner layer 106 formed on the bottom and sidewall of the first trench 105, and the oxide liner The pad layer 106 is located between the substrate 101 and the first isolation layer 107, and at the same time, the oxide pad layer 106 is formed on the top corner of the first trench 105, so that the first trench The apex ...

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Abstract

The invention provides a shallow trench isolation structure and a manufacturing method thereof, and the structure comprises: a substrate which is provided with a first trench; a first isolation layerwhich is formed at the bottom and on the side wall of the first groove, wherein a second groove is defined by the first isolation layer, the second groove comprises a lower groove part and an upper groove part communicated with the lower groove part, and the width of the upper groove part is larger than that of the lower groove part; and a second isolation layer which is filled in the second groove. According to the invention, inclined ion implantation is carried out, the etching rate of the upper part of the isolation layer is greater than that of the lower part, an opening in the upper partof the isolation layer is enlarged through an etching process, the funnel-shaped structure is formed, a cavity formed in the insulating layer of the shallow trench structure due to the fact that the deposition rate of the insulating material at the opening of the shallow trench structure is larger than the deposition rate of the insulating material at the bottom can be avoided, the filling qualityof the insulating material is improved, and the performance of the shallow trench isolation structure is improved.

Description

technical field [0001] The invention belongs to the field of design and manufacture of semiconductor integrated circuits, in particular to a shallow trench isolation structure and a manufacturing method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, in order to achieve faster computing speed, greater information storage capacity and more functions of semiconductor devices, semiconductor chips are developing towards higher integration, that is, the characteristic size of semiconductor devices (CD, Critical Dimension) is smaller, and the integration of semiconductor chips is higher. Currently, semiconductor integrated circuits generally include active regions and isolation regions between the active regions, which are formed before the active devices are fabricated. As the semiconductor technology enters the deep sub-micron era, the isolation layer of the active region of the semiconductor device is mostly manufact...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762
CPCH01L21/76205H01L21/76224H01L21/76237
Inventor 辛欣
Owner CHANGXIN MEMORY TECH INC
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