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CMOS transconductance unit circuit based on self-adaptive bias

A technology of adaptive bias and transconductance unit, applied in electrical components, DC-coupled DC amplifiers, amplifiers with semiconductor devices/discharge tubes, etc., can solve the problem of output impedance reduction, small input voltage space, and common-mode input The voltage can not be reached and other problems, to achieve the effect of improving linearity, small dependence, and stable bias current

Pending Publication Date: 2020-07-14
SUZHOU UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the power supply voltage of the mainstream CMOS manufacturing process has dropped to 1.2V or even lower, but the threshold voltage and drain-source saturation voltage drop cannot be reduced in the same proportion, so the space left for the input voltage is getting smaller and smaller.
In practice, the common-mode input voltage cannot reach this theoretical value (VDD-Vdsat-VGS1), because when the current source ( figure 1 Medium M4 tube and figure 2 When the voltage drop of IB1) ​​is close to Vdsat, its output impedance has begun to decrease significantly, resulting in a decrease in the equivalent resistance of the source of the input transistor M1, so that the equivalent transconductance becomes larger

Method used

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  • CMOS transconductance unit circuit based on self-adaptive bias
  • CMOS transconductance unit circuit based on self-adaptive bias
  • CMOS transconductance unit circuit based on self-adaptive bias

Examples

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Embodiment

[0023] Example: refer to image 3 As shown, a CMOS transconductance unit circuit based on adaptive bias includes a transconductance unit main circuit and an adaptive bias current source; the transconductance unit main circuit includes a PMOS transistor M1a, a PMOS transistor M2a, and a PMOS transistor M3a , PMOS transistor M1b, PMOS transistor M2b, PMOS transistor M3b, resistor 2R1, current source I1a and current source I1b; the adaptive bias current source includes PMOS transistor M4a, PMOS transistor M5a matching PMOS transistor M4a, and PMOS transistor M6a , PMOS transistor M7a, PMOS transistor M4b, PMOS transistor M5b matching PMOS transistor M4b, PMOS transistor M6b, PMOS transistor M7b, current source I2a, current source I3a, current source I2b and current source I3b, wherein PMOS transistor M1a and PMOS transistor M1b is mirror-symmetrical, PMOS transistor M2a is mirror-symmetrical to PMOS transistor M2b, PMOS transistor M3a is mirror-symmetrical to PMOS transistor M3b,...

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Abstract

The invention discloses a CMOS transconductance unit circuit based on self-adaptive bias. A relatively constant bias current is provided for a transconductance unit main body circuit in a wide voltagerange; self-adaptive adjustment of the grid voltage and a large reserved voltage convolution space are utilized; a relatively low value is selected for a bias voltage Vbias1; a current source I1a canjust be saturated; thus, as input voltage rises, some input voltage ranges can be expanded after a PMOS tube M4a and a PMOS tube M5a enter the linear region, until the PMOS tube M7a enters the linearregion; the CMOS transconductance unit circuit is advantageous that a wide voltage input range can be obtained, which is a very important characteristic for a nanoscale CMOS process; the bias currentprovided for a transconductance main body circuit is very stable, that is, the dependence of the bias current on input voltage is very small, and linearity improvement can be facilitated.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design, in particular to a CMOS transconductance unit circuit based on adaptive bias. Background technique [0002] With the rapid progress of CMOS manufacturing technology, the feature size of the device is continuously reduced, and the power supply voltage is also continuously reduced, which leads to the limitation of the common-mode input voltage of the transconductance unit implemented by the classic differential pair. Usually we introduce source-level degeneration resistors in the differential structure to improve the linearity of the transconductance unit. On this basis, we can enhance the transconductance of the input MOS to the tube and increase the degeneration depth, which can further improve the linearity of the transconductance unit, but it It also faces the problem of limited common-mode voltage range. In the design of modern wireless receivers, the requirements for the in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03F1/42H03F3/45
CPCH03F1/42H03F3/45179
Inventor 白春风赵文翔汤雁婷乔东海
Owner SUZHOU UNIV
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