Approximate multiplier design method, approximate multiplier and image sharpening circuit

Abstract

The invention relates to an approximate multiplier design method, an approximate multiplier and an image sharpening circuit. The method comprises the steps that a half adder used for partial multiplication accumulation in an accurate 4-bit Dadda tree multiplier is replaced with a full adder, a low 4-bit calculation circuit is replaced with an approximate addition circuit, and the approximate 4-bitmultiplier is obtained, wherein the approximate summing circuit comprises a logic OR circuit, and is used for obtaining the value of the second bit from the LSB of the final product of the approximate 4-bit multiplier. An error detection and correction circuit is designed according to the values of the second to fourth columns from the LSB of the partial multiplication accumulation result in theapproximate 4-bit multiplier and the output value of the approximate addition circuit, and is used for eliminating the error of the final product output by the approximate 4-bit multiplier. Accordingto the method, the multiplier is substantially improved in structure, on one hand, the use amount of hardware resources is reduced, and on the other hand, an error correction mechanism is provided, sothat the calculation result of the approximate multiplier is more accurate.

Description

technical field [0001] The present application relates to the technical field of low power consumption digital signal processing circuit design, in particular to an approximate multiplier design method, an approximate multiplier and an image sharpening circuit. Background technique [0002] In some fault-tolerant applications, the accuracy of calculated values ​​can be moderately reduced, and calculations are performed on an "approximate" basis, and related technologies are collectively referred to as approximate calculations. The main idea of ​​circuit design for approximate computing is to change the logic of circuit implementation and reduce the resources occupied by the circuit by simplifying the circuit structure. Approximate calculation circuits have been widely used in digital signal processing (DSP) systems, multimedia, fuzzy logic and neural networks. While providing practical calculation results for related applications, the circuit is simplified and the chip area ...

AI Technical Summary

Problems solved by technology

In addition, for some approximate multiplier designs with error correction mechanisms, the implementation of the error correction mechanism is to improve the basic components of the compression and accumulation of partial product terms in the multiplier, without substantially improving the multiplier structure

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