Semiconductor structure and forming method

Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the forming method comprises the steps: providing a substrate which is provided with a gate structure; forming a first side wall on the side wall of the gate structure; respectively forming epitaxial layers in the gate structure and the substrate at two sides of the first side wall, wherein the surfaces of the epitaxial layers are higher than the surface of the substrate; forming a dielectric layer on the substrate, wherein the dielectric layer is located on the epitaxial layer and the surface of the first sidewall, and the dielectric layer exposes the gate structure; after the dielectric layer is formed, removing the first side wall, and forming first openings between the epitaxial layer and the gate structure and between the dielectric layer and the gate structure; and forming a second side wall in the first opening, wherein a gap located between the epitaxial layer and the gate structure is formed in the second side wall. The formed semiconductor structure reduces the power consumption of the transistor and improves the performance of the transistor.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In the field of semiconductor technology, integrated circuits have grown from a handful of interconnected devices fabricated on a single silicon chip to millions of devices. Conventional integrated circuits have performance and complexity far beyond what was originally envisioned. To achieve improvements in complexity and circuit density (i.e., the number of devices that can be packed into a given chip area), the size of the smallest device feature, also known as device "geometry," has also become smaller with each generation of integrated circuits. smaller. Therefore, by making individual devices of an integrated circuit smaller, more devices can be fabricated on each wafer, making devices smaller is very challenging. [0003] Complementary metal-oxide-semiconductor (CMOS) transist...

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Problems solved by technology

[0004] However, the performance of transistors in the prior art needs to be improved

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