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Capacitor and forming method thereof, DRAM unit and memory

A technology of capacitors and capacitors, which is applied in the direction of capacitors, electrical components, electric solid devices, etc., and can solve problems such as prone to collapse

Pending Publication Date: 2020-10-27
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At that time, as the height of the capacitor increases, the risk of collapse is prone to occur

Method used

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  • Capacitor and forming method thereof, DRAM unit and memory
  • Capacitor and forming method thereof, DRAM unit and memory
  • Capacitor and forming method thereof, DRAM unit and memory

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Embodiment Construction

[0027] As mentioned in the background art, the integration level of capacitors in the prior art needs to be further improved.

[0028] In order to solve the above problems, the applicant proposes a new capacitor and its forming method. In order to further improve the integration of the capacitor, more than two U-shaped lower electrode layers may be formed in one capacitor and connected to the same electrical contact portion. To form more than two U-shaped lower electrode layers, it is necessary to form more than two capacitance holes on one electrical contact portion, and the critical size of the capacitance holes is greatly reduced. Under the current process conditions, it is difficult to realize through the existing photolithography and etching process. Even if the capacitor hole with smaller size can be formed through the double patterning process, multiple photolithography and etching are required, and the process cost is greatly increased. . Applicants have overcome the...

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PUM

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Abstract

The invention relates to a capacitor and a forming method thereof, a DRAM unit and a memory. The forming method of the capacitor comprises the steps of providing a substrate, wherein the substrate isinternally provided with an electric contact part; forming a dielectric layer on the surface of the substrate, wherein the dielectric layer comprises support layers and sacrificial layers which are alternately stacked; forming at least two capacitance holes which penetrate through the sacrificial layers and the support layers and expose the same electric contact part; forming a lower electrode layer covering the inner wall of the capacitor hole, wherein the lower electrode layer is connected with the electric contact part; removing the sacrificial layer; and sequentially forming a capacitor dielectric layer and an upper electrode layer on the inner and outer surfaces of the lower electrode layer and the surface of the support layer. The method can improve the capacitance value per unit area of the capacitor.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a capacitor and its forming method, a DRAM unit and a memory. Background technique [0002] Dynamic Random Access Memory (DRAM for short) is a semiconductor storage device commonly used in computers, and is composed of many repeated storage units. Each memory cell typically includes a capacitor and a transistor. [0003] With the continuous development of semiconductor technology, the performance requirements of capacitors in semiconductor integrated circuits are also getting higher and higher. For example, it is desired to form more capacitors in a limited area and improve the integration of capacitors. The improvement of the integration degree of the capacitor can improve the integration degree of the dynamic memory. [0004] In the prior art, in order to improve the integration degree of the capacitor, the capacitor is usually designed in a vertical shape, and the cap...

Claims

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Application Information

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IPC IPC(8): H01L23/64H01L21/027
CPCH01L28/40H01L21/0274H01L28/87H01L28/90H01L21/31144H01L21/32155H01L23/642H10B12/315H10B12/033H01L28/88H10B12/31
Inventor 不公告发明人
Owner CHANGXIN MEMORY TECH INC
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