Chip packaging test production line performance control method based on Q-learning reinforcement learning

A technology of chip packaging and reinforcement learning, applied in program control, comprehensive factory control, comprehensive factory control, etc., can solve problems such as control strategy conflicts, incomplete consideration of variability factors, untimely response, etc.

Active Publication Date: 2020-10-30
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology

The method of the present invention aims at the problems of untimely response to the existing variability factors, incomplete consideration of the variability factors, and conflicts in control strategi...

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  • Chip packaging test production line performance control method based on Q-learning reinforcement learning
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  • Chip packaging test production line performance control method based on Q-learning reinforcement learning

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Embodiment Construction

[0086] Below in conjunction with accompanying drawing and embodiment the present invention is described in further detail, present embodiment is implemented under the premise of technical solution of the present invention, has provided detailed embodiment and concrete operation process ( figure 1 ), but the protection scope of the present invention is not limited to the following examples.

[0087] The embodiment can be mainly divided into the following steps:

[0088] Step 1: Semiconductor chip packaging and testing production line model abstraction: Taking the chip packaging and testing production line as the research object, assuming that there is a buffer zone of limited size between workstations, and the queuing rule is first-come-first-served, it is abstracted as a model that includes reentry (rework) Multi-station serial-parallel queuing production line model ( figure 2 ).

[0089] Step 2:

[0090] Step 2.1: Calculation of variability.

[0091] Calculate the arriv...

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Abstract

The invention relates to the field of semiconductor chip packaging test production line performance control and optimization, and particularly relates to a chip packaging test production line performance control method based on Q-learning reinforcement learning. According to the invention, a more accurate semiconductor packaging test series-parallel production line performance prediction model isestablished; and a Morris screening method and an Arena simulation method are comprehensively used for carrying out global sensitivity quantitative analysis, a plurality of influence factors which have the greatest influence on the production line performance and influence rules thereof are obtained, and the conditions that the Markov state space of equipment is huge and traditional mathematical model analysis is not suitable are avoided. According to the method, the variability factors of the production line are controlled on the basis of performance prediction and sensitivity analysis, and the valuing mode of the parameter [epsilon] is improved, so that the convergence rate of the algorithm is higher, local optimization is avoided, and meanwhile, the performance control method has betterflexibility and real-time performance.

Description

technical field [0001] The invention relates to the field of performance control and optimization of a semiconductor chip packaging and testing production line, specifically for a semiconductor chip packaging and testing production line, and relates to a performance control method combining sensitivity analysis and Q-learning reinforcement learning algorithm. Background technique [0002] The semiconductor manufacturing industry has great strategic value for the development of the national economy. In order to maintain the sound development of my country's semiconductor manufacturing industry, in addition to expanding the production scale, it is also necessary to pay attention to the production efficiency of the manufacturing system and strengthen production management and control technology. Due to the production characteristics of the semiconductor manufacturing system, such as highly reentrant process paths, highly complex production process, long manufacturing cycle, larg...

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Application Information

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IPC IPC(8): G05B19/418
CPCG05B19/41885G05B2219/32339Y02P90/02
Inventor 李波冯益铭钱鑫森
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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