Check patentability & draft patents in minutes with Patsnap Eureka AI!

Etching methods for semiconductor structures

A semiconductor and over-etching technology, applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device testing/measurement, electrical components, etc., can solve the problem of inability to accurately obtain semiconductor structure etching, insufficient etching, excessive etching, etc. problems, to achieve the effect of improving the etching accuracy

Active Publication Date: 2022-08-02
SHANGHAI HUALI MICROELECTRONICS CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, when the light transmittance of the semiconductor structure is too large or too small, the EPD cannot accurately obtain the etching situation of the semiconductor structure, resulting in excessive or insufficient etching.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Etching methods for semiconductor structures
  • Etching methods for semiconductor structures
  • Etching methods for semiconductor structures

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0032] The specific embodiments of the present invention will be described in more detail below with reference to the schematic diagrams. The advantages and features of the present invention will become more apparent from the following description. It should be noted that, the accompanying drawings are all in a very simplified form and in inaccurate scales, and are only used to facilitate and clearly assist the purpose of explaining the embodiments of the present invention.

[0033] figure 1 A flowchart of a method for etching a semiconductor structure provided by an embodiment of the present invention. see figure 1 , the etching method of the semiconductor structure provided by this embodiment includes:

[0034] Step S01 : providing a semiconductor structure, the semiconductor structure includes a substrate and a UTM stack formed on the substrate, the UTM stack includes a first low dielectric oxide layer, a second low dielectric oxide layer formed on the substrate in seque...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention provides an etching method for a semiconductor structure, including providing a semiconductor structure, the semiconductor structure comprising a substrate and a UTM stack on the substrate, the UTM stack comprising a first low-voltage layer formed on the substrate in sequence A dielectric oxide layer, a second low dielectric oxide layer and an etch stop layer; a patterned photoresist layer is formed on the UTM stack, and the light transmittance of the photoresist layer is collected; the UTM stack is subjected to main etching and etching Etch the second low-dielectric oxide layer and stop at the first low-dielectric oxide layer; substitute the transmittance into the over-etching equation to obtain the over-etching process parameters and feed them back to the process chamber to over-etch the UTM stack so that the The etch stops at the etch stop layer. The semiconductor structure etching method provided by the present invention obtains the over-etching equation by fitting the relationship between the light transmittance of different semiconductor structures and the over-etching process parameters, so as to calculate and adjust the time when the semiconductor structure is over-etched. process parameters, thereby improving the etching accuracy of the semiconductor structure.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, and in particular, to a method for etching a semiconductor structure. Background technique [0002] In the integrated circuit production process, the back-end copper interconnection will be applied to the etching process of the ultra thick metal layer (UTM). The etching process of the UTM has higher requirements on the etching selection ratio and uniformity. High difficulty. During the UTM etching process, the loading effect between different semiconductor structures needs to be considered, otherwise, punch through of the semiconductor structure due to over-etching or metal metal due to insufficient etching of the semiconductor structure will occur. Line disconnection etc. In the prior art, endpoint monitoring (EPD) is usually used to detect the etching of UTM, and the corresponding emission spectra (OES) generated by chemical changes of different dielectric layers of the semicon...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/311H01L21/66
CPCH01L21/31144H01L21/31116H01L22/12H01L22/20H01L22/26
Inventor 梁梦诗蒋燚
Owner SHANGHAI HUALI MICROELECTRONICS CORP
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More