Method for realizing robust clock tree comprehensive algorithm for near threshold

A clock tree synthesis and implementation method technology, applied in the field of robust optimization, can solve problems affecting buffer timing, clock tree deviation and maximum conversion time, etc., to achieve fast synthesis process, small clock deviation, and strong generalization ability Effect

Pending Publication Date: 2021-01-22
SOUTHEAST UNIV
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Problems solved by technology

Since the threshold of the transistor is very close to the operating voltage at near-threshold, the fluctuation of the transistor model parameters during the manufacturing process can very significantly affect the

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  • Method for realizing robust clock tree comprehensive algorithm for near threshold
  • Method for realizing robust clock tree comprehensive algorithm for near threshold
  • Method for realizing robust clock tree comprehensive algorithm for near threshold

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Embodiment Construction

[0029] The present invention will be further described below in conjunction with accompanying drawing:

[0030] The present invention applies the symmetrical clock tree structure to the design of the near-threshold value to ensure a small clock deviation. At the same time, a buffer insertion strategy oriented to the buffer library is adopted, and the size of the buffer is scaled during the insertion process to reduce the size of the buffer as much as possible. Clock skew fluctuations due to insertion. figure 1 It is an overall flowchart of the present invention, and the whole flow takes all register position information and clock buffer library as input, and takes maximum conversion time and maximum load capacitance as constraints. The goal of the entire flow is to build a symmetrical buffer-plugged clock tree structure with minimal clock skew fluctuations while satisfying constraints at near-threshold. The whole process is divided into two parts, such as figure 1 (a) and f...

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Abstract

The invention discloses a method for realizing a robust clock tree comprehensive algorithm for a near threshold. The method comprises the following steps of: 1, generating a symmetric clock tree initial topology by adopting a top-down comprehensive algorithm; and 2, completing buffer insertion on the basis of the generated topological structure, applying the approximate estimation model of the clock skew fluctuation to the buffer insertion process of various buffer sizes, and realizing the optimization process based on a genetic algorithm by taking the optimization of the clock skew fluctuation as a target. According to the implementation method of the robust clock tree comprehensive algorithm for the near threshold, the clock tree comprehensive algorithm takes the symmetrical clock tree as an initial topology to be applied to the near threshold, so that the clock tree is ensured to have very small clock skew. In the buffer insertion stage, a buffer insertion algorithm oriented to a buffer library is realized, and the process realizes selection of an optimal buffer insertion strategy from the buffer library, so that clock deviation fluctuation of a clock tree is as small as possible.

Description

technical field [0001] The invention belongs to the field of electronic design automation in the physical design of integrated circuits, and is a robust optimization method applied to the design of integrated circuit clock trees in low-voltage near-threshold. Background technique [0002] In low-power integrated circuit design, near-threshold design has the highest energy efficiency ratio. The power consumption of the clock tree in the entire circuit design is basically 30%-40%. Therefore, the importance of the clock tree design under the near-threshold for low-power design is self-evident. [0003] Reducing the impact of process fluctuations on design is the most important problem to be solved in near-threshold design, and it is also a point that distinguishes it from constant voltage design. Structurally, the clock tree is mainly composed of clock sources, buffers, interconnect lines and registers. Since the threshold of the transistor at near-threshold is very close to...

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Application Information

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IPC IPC(8): G06F30/396
CPCG06F30/396
Inventor 王学香徐镇宇宋相男张诗莹曹鹏
Owner SOUTHEAST UNIV
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