Apparatus and method for reducing access device sub-threshold leakage in semiconductor device

Abstract

The invention relates to an apparatus and method for reducing access device sub-threshold leakage in a semiconductor device. In some examples, a non-active word line voltage control (IWVC) circuit maybe configured to provide a non-active potential (from a default off-state word line voltage (VNWL) to a reduced voltage (VNWL) that is lower than the default VNWL) to a respective sub-word driver associated with one of a plurality of banks after a certain duration after activating the bank. The IWVC circuit may also be configured to provide the default VNWL to a respective sub-word driver in response to pre-charging the bank. The IWVC circuit may include a multiplexer coupled to the sub-word drivers and configured to provide the default VNWL or the reduced voltage VNWL to the respective sub-word drivers in response to a VNWL control signal. The IWVC circuit may also include a time control circuit configured to provide the VNWL control signal in response to a clock signal and a time control signal.

Description

technical field [0001] The present disclosure relates to semiconductor devices, and more particularly to apparatus and methods for reducing access device subthreshold leakage in semiconductor devices Background technique [0002] A semiconductor memory device such as a DRAM (Dynamic Random Access Memory) includes a memory cell array having memory cells arranged at intersections between word lines and bit lines. A semiconductor memory device may include main word lines and sub word lines in a hierarchical structure. The main word line is the word line located in the upper layer, and is selected by the first part of the row address. A sub word line is a word line located in a lower layer, and is selected based on a corresponding main word line (MWL) and a word driver line (FX) selected by the second part of the row address. [0003] Due to scaling of array access devices in semiconductor fabrication (eg, smaller pitch dimensions of transistor circuits and need to rebalance i...

AI Technical Summary

Problems solved by technology

This increase in the IOFF leakage of the access device may lead to a decrease in the reliability of the memory device

For example, when a sense amplifier drives a bit line to a '0', it may affect a cell storing data '1'

This increase in access device IOFF leakage has limited further scaling of the memory cell

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