Data storage method of FPGA-based real symmetric matrix eigenvalue decomposition

Abstract

The invention discloses a data storage method of FPGA-based real symmetric matrix eigenvalue decomposition, which makes full use of the fact that the number of data stored in each row of an upper triangular structure array is linearly decreased from top to bottom, nearly half of idle storage exists, and an RAM (Random Access Memory) complementary storage structure is adopted to replace a common ping-pong structure, so that idle storage is fully utilized; therefore, the effect of saving nearly half of RAM storage resources is achieved. And besides, the addressing addresses of each row of elements are sorted from right to left to replace the common sorting from left to right, so that the row-column exchange rule of the original real symmetric matrix is reserved, and the digital circuit implementation of the row-column data exchange rule of the upper triangular array structure after Jacobi rotation calculation is facilitated. According to the method, for eigenvalue decomposition of a large-size matrix, the access frequency of an external DDR can be reduced, and even the overall algorithm is completely deployed in the FPGA to be realized, so that the eigenvalue decomposition efficiency of the real symmetric matrix is remarkably improved.

Description

Technical field[0001]The present invention relates to the field of signal processing, and more particularly to a data storage method based on FPGA-based actualistic matrix eigenvalue decomposition.Background technique[0002]The symmetric matrix eigenvalue is widely used in wireless communication, deep learning, image compression and other fields. Since there is a large number of numerical calculations and data exchanges in the matrix eigenvalue decomposition process, the calculation process requires multi-wheel cyclic iteration, enhances the physical objective matrix characteristics. The performance of the value decomposes faces a huge challenge. Based on the FPGA chip and Jacobi algorithm implementation is currently being a research hotspot, which combines the advantages of FPGA and Jacobi high parallel, which can be used to enhance the efficiency of eigenvalue decomposition. For actual symmetrical matrices, currently general practice is to save close to half of input data storage t...

AI Technical Summary

Problems solved by technology

This method is based on the continuous supply of input data. If the input data stagnates, for example, as the size of the input matrix increases, the internal RAM storage resources of the FPGA are insufficient, and the pipeline performance will be seriously affected.

[0004] The patent with application number CN2019105040347 mentions that by changing the order of input and output data in the internal processing unit of the array structure during the iteration process, the efficiency of the iterative operation is improved, and more emphasis is placed on the optimization of the scheduling order. In terms of data storage design, then did not mention

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