Method for forming metal cobalt interconnection layer and tungsten metal contact hole layer

Abstract

The invention discloses a method for forming a metal cobalt interconnection layer and a tungsten metal contact hole layer, and the method comprises the steps: providing a substrate with a metal cobalt interconnection line layer structure, and forming a dielectric layer on the substrate; performing a photoetching process on the dielectric layer to form a metal tungsten through hole layer; etching part of metal cobalt located on the surface of the metal cobalt interconnection line layer structure downwards through a wet etching process, and forming rivet-shaped morphology at the bottom of a through hole in the metal tungsten through hole layer; filling the through hole in the metal tungsten through hole layer by using a selective tungsten deposition process to form a tungsten through hole with a rivet-shaped bottom; sequentially depositing a TiN adhesive layer and a metal tungsten layer, and forming a through hole tungsten plug covering layer on the through hole layer; and performing tungsten chemical mechanical planarization on the metal tungsten through hole layer, and removing the through hole tungsten plug covering layer to form the planarized through hole layer. According to the method, rivet-shaped tungsten is formed at the bottom of the through hole to block permeation of the CMP grinding fluid by utilizing the isotropy characteristic of a wet process, so that the problem of cobalt loss of nodes of 7nm or below is solved.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit technology, in particular to a method for forming a metal cobalt interconnection layer and a tungsten metal contact hole layer, which is used to solve the cobalt deficiency of the interconnection line layer in the 7nm and below node manufacturing process. Background technique [0002] As the size of semiconductor devices shrinks, the contact hole or contact groove CD shrinks, and the sheet resistance (SheetResistance RS) increases accordingly, and the contribution of the bonding layer (Ti / TiN) to RS becomes more and more obvious. At present, many research institutions in the world have carried out research on the selective tungsten deposition process (selective W deposition) technology that does not require a bonding layer, especially for the via layer Via 0 (V0) of the 10nm and below technology nodes. In terms of filling, certain results have been achieved. Since 7nm has ...

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Problems solved by technology

[0004] However, it is clear to those skilled in the art that if the metal tungsten via layer adopts a selective metal tungsten deposition process without an adhesive layer, then the bonding between the metal tungsten via layer and the silicon oxide / silicon nitride dielectric layer of the sidewall is not very good. Well, this will cause the tungsten in the subsequent metal tungsten via layer to be in the chemical mechanical polishing (tungsten grinding W CMP) manufacturing process, and the grinding liquid of CMP will corrode the active cobalt in the lower layer (metal cobalt interconnect layer) through this interface, resulting in Cobalt Deficiency Problem

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