Integrated circuit device, electronic equipment, board card and computing method

An integrated circuit and algorithm technology, applied in the field of data processing, can solve problems such as reducing parallel computing efficiency, large computing and power consumption overhead, and I/O bottlenecks, so as to reduce I/O data transmission volume and reduce I/O bandwidth The effect of restricting and improving execution efficiency

Pending Publication Date: 2021-04-20
SHANGHAI CAMBRICON INFORMATION TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, even with parallel computing, because the processor is limited by the capacity of internal register resources, the huge amount of data calculation may lead to a large amount of data interaction between the processor and external storage devices
Due to the limited bandwidth of the input / output ("I / O") bus, severe I / O bottlenecks can occur, thus greatly reducing the efficiency of parallel computing
In addition, not only the bandwidth limitation of the I / O bus will become a performance bottleneck, but also a large amount of I / O memory access between the processor and the external storage device will also cause a large calculation and power consumption overhead

Method used

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  • Integrated circuit device, electronic equipment, board card and computing method
  • Integrated circuit device, electronic equipment, board card and computing method
  • Integrated circuit device, electronic equipment, board card and computing method

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Embodiment Construction

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present disclosure with reference to the accompanying drawings in the embodiments of the present disclosure. Apparently, the described embodiments are part of the embodiments of the present disclosure, not all of them. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the solutions disclosed in the present disclosure.

[0024] Specific implementation manners of the present disclosure will be described in detail below in conjunction with the accompanying drawings.

[0025] figure 1 is a schematic architecture diagram illustrating an integrated circuit device 100 according to an embodiment of the present disclosure. Such as figure 1 As shown, the integrated circuit device 100 provided by the present disclosure may include a data interface 102 and a pl...

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Abstract

The invention discloses an integrated circuit device, electronic equipment, a board card and a computing method by using the integrated circuit device. The integrated circuit device may be included in a computing processing device of the combined processing device, which may include one or more integrated circuit devices. The combined processing device can further comprise an interface device and other processing devices. The computing processing device interacts with other processing devices to jointly complete the computing operation specified by the user. The combined processing device can further comprise a storage device, and the storage device is connected with the equipment and other processing devices and used for storing data of the equipment and other processing devices. According to the scheme, the data transmission quantity between the internal equipment and the external storage device can be reduced, so that the I / O bottleneck problem caused by bandwidth limitation is reduced to the greatest extent, and the overall performance of the integrated circuit device can be improved.

Description

technical field [0001] The present disclosure relates generally to the field of data processing. More specifically, the present disclosure relates to an integrated circuit device, an electronic device, a board, and a computing method. Background technique [0002] With the development of the field of artificial intelligence, the amount of computational data involved in large-scale neural networks is increasing, and the requirements for storage capacity are getting higher and higher, such as convolution weight gradients in backpropagation and other operations. In existing computing methods, processors such as a central processing unit (“CPU”) or a graphics processing unit (“GPU”) are usually used for computing. However, even if parallel computing is adopted, since the processor is limited by the capacity of internal register resources, the huge amount of data calculation may lead to a large amount of data interaction between the processor and the external storage device. Du...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/063G06N3/04G06N3/08
Inventor 不公告发明人
Owner SHANGHAI CAMBRICON INFORMATION TECH CO LTD
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