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Super junction device and manufacturing method thereof

A technology of super junction devices and manufacturing methods, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of increasing the difficulty of process control, small P-pillar width, and large deviation of breakdown voltage, etc.

Pending Publication Date: 2021-05-07
NANTONG SANRISE INTEGRATED CIRCUIT CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But in this way, in the manufacturing process, especially in the trench process, due to the small width of the P column, the difficulty of process control is increased, and at the same time, the concentration of filling impurities is increased, and because of the increase in the absolute value of the concentration, the same percentage of process Changes, the change of the total amount of impurities will increase, the degree of charge imbalance will be serious, and the deviation of device performance, including the deviation of breakdown voltage, will be large, affecting the consistency of the device

Method used

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  • Super junction device and manufacturing method thereof
  • Super junction device and manufacturing method thereof
  • Super junction device and manufacturing method thereof

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Embodiment Construction

[0058] Existing superjunction devices:

[0059] In order to compare with the super junction device of the first embodiment of the present invention, first introduce the existing super junction device, such as figure 1 Shown is a schematic structural view of an existing super junction device; the existing super junction device includes a super junction structure formed by alternating arrangement of P-type columns 103 and N-type columns 101; the super-junction device is an N-type device and is formed on the super junction In junction structure: one P-type pillar 103 and one adjacent N-type pillar 101 form a super junction unit.

[0060] In the prior art, the P-type column 103 is composed of a P-type epitaxial layer filled in the trench 102 . The N-type column 101 is composed of the N-type epitaxial layer 101 between the trenches 102 . The trench 102 is located in the N-type epitaxial layer 101 , and the N-type epitaxial layer 101 at the bottom of the trench 102 serves as a buf...

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Abstract

The invention discloses a super junction structure, and the structure is formed above the surface of a first N-type epitaxial layer, the width of a P-type column at the top position of a super junction unit is smaller than that of an N-type column, and stepping is not changed; the N-type column is composed of a second N-type epitaxial layer filled in the grooves, the P-type column is composed of a first P-type epitaxial layer between the grooves, and the first P-type epitaxial layer is formed on the first N-type epitaxial layer; the groove penetrates through the first P-type epitaxial layer, and the bottom of the groove is in contact with the first N-type epitaxial layer; the total amount of P-type impurities in the P-type columns in the super junction units is matched with the total amount of N-type impurities in the N-type columns, and the doping concentration of the P-type columns is higher than that of the N-type columns. The invention further discloses a manufacturing method of the super junction device. According to the invention, the process control difficulty can be reduced, and the consistency of the device can be improved; when the grooves are inclined, the high-temperature on-resistance of the device can be reduced, the PN impurity difference between the top and the bottom of the super junction unit is reduced, and the breakdown voltage of the device is improved.

Description

technical field [0001] The invention relates to the field of manufacturing semiconductor integrated circuits, in particular to a super junction device; the invention also relates to a method for manufacturing the super junction device. Background technique [0002] A super junction structure is a structure of alternately arranged N-type pillars and P-type pillars, that is, PN pillars. If the superjunction structure is used to replace the N-type drift region in the vertical double-diffused MOS transistor (Vertical Double-diffused Metal-Oxide-Semiconductor, VDMOS) device, a conduction path is provided in the conduction state (only the N-type column provides a path, The P-type column is not provided), and bears the reverse bias voltage in the off state (the P and N columns are jointly borne), and a super-junction metal-oxide-semiconductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET) is formed. The super-junction MOSFET can greatly reduce ...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06H01L29/36H01L21/336
CPCH01L29/7811H01L29/0634H01L29/0684H01L29/36H01L29/66712
Inventor 肖胜安曾大杰
Owner NANTONG SANRISE INTEGRATED CIRCUIT CO LTD
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