Substrate preparation method and substrate structure, chip packaging method and chip packaging structure
A substrate preparation and substrate technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve the problem that the depth of the opening is not easy to control, the conductive circuit of the chip is easy to be damaged, and the yield rate of the chip packaging structure is affected To achieve the effect of improving the stability of interface bonding, improving the efficiency of opening holes, and reducing warpage
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Publication Date
- 2022-08-05
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Abstract
Description
technical field
[0001] The invention relates to the technical field of integrated circuits, in particular to a substrate preparation method and substrate structure, a chip packaging method and a chip packaging structure. Background technique
[0002] With the trend of miniaturization and integration of electronic products, the high density of microelectronic packaging technology has gradually become the mainstream in the new generation of electronic products. In order to adapt to the development of a new generation of electronic products, especially the development of mobile phones, notebooks, smart wearable devices and other products, chips are developing in the direction of higher density, faster speed, smaller size and lower cost.
[0003] During the packaging process, due to the difference in thermal expansion coefficients of plastic, silicon and metal materials, the volume changes of these materials are not synchronized, resulting in stress and warpage. Among them, the...
Examples
Embodiment 1
[0082] The chip packaging method of this embodiment includes the following steps:
[0083] S10, prepare the first sub-substrate:
[0084] S10a, providing a first glass substrate 11, pasting a first photosensitive dry film on one side of the first glass substrate 11, and forming several windows after exposure and development;
[0085] S10b, opening a TGV through hole 12 in the window for the first glass substrate 11, refer to figure 1 ;
[0086] S10c, forming conductive pillars 13 in the TGV through hole 12, making one end surface of the conductive pillar 13 flush with the surface of the first glass substrate 11, and making the other end surface of the conductive pillar 13 protrude from the first glass substrate 11 Form bosses, refer to figure 2 ;
[0087] S10d, removing the remaining first photosensitive dry film.
[0088] S20, prepare the second sub-substrate:
[0089] S20a, providing the second glass substrate 21 with the same thickness as the boss length, and designi...
Embodiment 2
[0120] The chip packaging method of this embodiment is basically the same as that of the above-mentioned first embodiment (for the drawings, please refer to the drawings in the above-mentioned first embodiment, and the same reference numerals are used for the same components), and the difference lies in step S20a and step S30:
[0121] S20a, provide the second glass substrate 21, design the opening area of the circuit groove 22 and the opening position of the via hole 23 in the circuit groove 22 according to the circuit of the first redistribution layer 24 and the position of the conductive column 13, and then carry out laser focusing modification After modification, ammonium hydrogen fluoride solution is used for immersion to etch the laser focused modified area, so as to open a circuit groove 22 on one side of the second glass substrate 21 and open a line through the second glass substrate 22 in the circuit groove 22. Vias 23 of the substrate 21 .
[0122] S30, the first s...