Three-dimensional packaging structure and preparation method based on silicon aluminum alloy vertical interconnect packaging substrate and lcp rewiring

Abstract

The invention discloses a three-dimensional packaging structure based on a silicon-aluminum alloy vertically interconnected packaging substrate and LCP rewiring and a preparation method. The LCP redistribution layer, the silicon aluminum alloy vertical interconnection packaging substrate at least includes a first silicon aluminum alloy vertical interconnection packaging substrate, a second silicon aluminum alloy vertical interconnection packaging substrate; the first silicon aluminum alloy vertical interconnection packaging substrate and the second silicon aluminum alloy vertical interconnection packaging substrate The silicon-aluminum alloy vertical interconnection packaging substrates are bonded by LCP airtight bonding layer to form an interconnection and an airtight cavity, and the first and second silicon-aluminum alloy vertical interconnection packaging substrate surfaces in the airtight cavity pass through The LCP redistribution layer is bonded by thermocompression; the upper surface and the bottom of the three-dimensional packaging structure are respectively thermocompressed and bonded to the LCP redistribution layer. The silicon-aluminum alloy and LCP materials are combined by thermocompression bonding to prepare a three-dimensional packaging structure, which can meet the needs of miniaturization, high performance and multi-function of microelectronic packaging.

Description

technical field [0001] The invention belongs to the technical field of packaging in the microelectronics industry, and in particular relates to a three-dimensional packaging structure based on silicon-aluminum alloy vertically interconnected packaging substrates and LCP rewiring. Background technique [0002] High performance and miniaturization are the continuous requirements of all electronic products. The famous "Moore's Law" has predicted the trend of miniaturization of integrated circuits for a long time. However, by further reducing the feature size of integrated circuits and the width of interconnection lines The way to improve performance is limited by the physical characteristics of materials and equipment technology, and the traditional "Moore's Law" has been difficult to continue to develop. At present, the world's most advanced integrated circuit process technology is EUV (extreme ultravioletlithography, extreme ultraviolet lithography) lithography technology. TS...

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Problems solved by technology

[0004] However, there is currently no packaging structure that combines silicon aluminum alloy and LCP materials

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