Method for forming semiconductor device

Abstract

Semiconductor devices and methods of forming the same are provided. The method of an embodiment includes the steps: receiving a substrate including an underside contact structure; depositing a first dielectric layer on the substrate; forming a metal-insulating layer-metal structure on the first dielectric layer; depositing a second dielectric layer on the metal-insulating layer-metal structure; performing a first etching process to form an opening extending through the second dielectric layer to expose the metal-insulating layer-metal structure; performing a second etching process to extend the opening through the metal-insulating layer-metal structure to expose the first dielectric layer; and performing a third etching process to further extend an opening through the first dielectric layer to expose the lower contact structure. The etching agents of the first etching process and the third etching process comprise fluorine, and the etching agent of the second etching process does not contain fluorine.

Description

technical field [0001] Embodiments of the present invention relate to methods of forming semiconductor devices, and more particularly to forming openings through metal-insulator-metal structures (and overlying and underlying dielectric layers) with multiple etch processes. Background technique [0002] The semiconductor integrated circuit industry has experienced rapid growth. Technological advances in integrated circuit materials and design have resulted in each generation of integrated circuits having smaller and more complex circuits than the previous generation. However, these advances have also increased the complexity of manufacturing and processing integrated circuits. To realize these advances, similar developments are required in the methods of manufacturing and processing integrated circuits. In the evolution of integrated circuits, functional density (eg, the number of interconnect devices per unit chip area) generally increases as geometric dimensions (eg, the ...

AI Technical Summary

Problems solved by technology

One or more non-volatile insulating by-products can be produced during etching of the conductive plate layer, causing step-like structures and increasing joint resistance

Therefore, although the existing metal-insulator-metal structure and its manufacturing method are suitable for its development purpose, it cannot fully meet the needs of all aspects.

Images