Multi-core processor application system and method for improving reliability of multi-core processor application system

A multi-core processor and application system technology, applied in the direction of electrical digital data processing, fault hardware testing methods, instruments, etc., to achieve huge social and economic benefits, avoid application system reliability risks, and effectively exchange data

Pending Publication Date: 2021-08-27
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, multi-core processors in the airborne field are in the exploratory and trial period, and there may be reliability and security risks; it is urgent to comprehensively deal with related issues through various means to improve the reliability and security of the system in the application process

Method used

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  • Multi-core processor application system and method for improving reliability of multi-core processor application system

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Embodiment 1

[0037] The embodiment of the present invention provides a multi-core processor application system and a method for improving its reliability. The method can use two or more multi-chip multi-core processors to improve the reliability of the multi-core processor application system. The following uses two chips and two cores for processing The device is taken as an example to describe the technical solution.

[0038] Use three cores in two processors to build three similar redundancy systems, and the fourth core is used for redundancy management; use two cores in one processor and one core in the other processor for a total of three processing Core and connect signal input and output circuit modules through bus expansion to build a complete three similar redundancy systems;

[0039] Select the same fourth processor core other than the three-redundancy processor core as a dedicated redundancy management processing core; the working characteristics of each channel are consistent, b...

Embodiment 2

[0043] The embodiment of the present invention also provides a system architecture method for improving the reliability of the multi-core processor application system, specifically:

[0044] First: use multi-chip multi-core processors to build multiple similar redundancy channels;

[0045] Second: Select a certain core in a multi-core processing processor as the redundancy management core, and the rest of the cores as the redundancy channel processing core;

[0046] Third: expand the input and output units of multi-chip multi-core processors through system bus links to form corresponding similar redundancy channels;

[0047] Fourth: The channel is synchronized with a wide delay through the interruption between cores and chips;

[0048] Fifth: Synchronous self-inspection and CCDL fault self-inspection for each redundant channel, and information exchange and sharing between cores through CCDL cross-channel;

[0049] Sixth: Set the input and output of redundant channel signals,...

Embodiment 3

[0068] Multi-core processors such as FT1500A and FT2000HK processors are used for implementation; signal input, output modules and processor modules are connected through backplane buses (PCI, Gigabit Ethernet, etc.) to facilitate CCDL (channel crossover) data exchange;

[0069] Set data input, output, and processor core operating status (synchronization) as fault monitoring points for fault monitoring, and run corresponding software for redundancy voting management to ensure the normal operation of a certain channel of the product when it fails. Redundancy management includes strategies such as input circuit fault management, synchronous fault management, CCDL fault management, and channel fault management. The management strategy needs to be analyzed according to the fault mode of the product.

[0070] The software voting method can be used to vote 2 / 3 for each signal of the 3 channels, cooperate with the operation of BIT software (self-test program), shield the fault signal,...

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PUM

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Abstract

The invention belongs to the field of autonomous and controllable development of airborne computers, aiming at the requirements of autonomous, controllable, high-safety and high-reliability development of airborne system computers and the problem of system reliability risk possibly existing in the exploration and use process of a dual-core processor in the aviation field at present, the invention provides a method for constructing a redundancy fault-tolerant airborne computer system by using the dual-core characteristic of a dual-core processor, which can perform effective data exchange and redundancy management, avoid the reliability risk of an application system of the dual-core processor from the perspective of application design, construct a highly autonomous and controllable, high-safety and high-reliability airborne computer, and generate huge social and economic benefits.

Description

technical field [0001] The invention belongs to the field of independent and controllable research and development of airborne computers, and in particular relates to a multi-core processor application system and a method for improving its reliability. Through the improvement of application measures, the reliability of the application system of the multi-core processor is improved, and the application design for reducing application risks method. Background technique [0002] With the continuous improvement of the airborne system's requirements for independent controllable, high performance, high safety, and high reliability of the computer, the contradiction between the long-term technical exploration and accumulation of independent controllable processor development has gradually become prominent, especially the processor core. As the top priority, the research and development of is even more difficult! [0003] At present, multi-core processors in the airborne field are ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/4401G06F11/22G06F11/30
CPCG06F9/4405G06F11/2273G06F11/3013G06F11/3051
Inventor 吴蓬勃梁争争杨敬宝许少尉
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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