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Calibration method and system for single-slope analog-to-digital converter

A technology for analog-to-digital converters and calibration systems, applied in the directions of analog/digital conversion calibration/test, analog/digital conversion, code conversion, etc., can solve problems affecting the results of analog-to-digital conversion, and achieve low cost, convenient operation, and automation high level effect

Active Publication Date: 2022-06-03
HANGZHOU HIKMICRO SENSING TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] During the conversion process of analog signal to digital signal, the slope of the ramp signal and the startup time of the ramp generator and counter directly affect the output pulse width and clock pulse count of the comparator, which in turn affects the analog-to-digital conversion result

Method used

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  • Calibration method and system for single-slope analog-to-digital converter
  • Calibration method and system for single-slope analog-to-digital converter
  • Calibration method and system for single-slope analog-to-digital converter

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Embodiment Construction

[0061] In the related art, there are mainly three calibration modes of the ADC, which are manual debugging, software debugging and hardware debugging.

[0075] The analog-to-digital conversion characteristics of the single-slope ADC are shown in FIG. 4 . The input-output characteristic curve of a single-slope ADC is expressed as

[0079] The first number D

[0093] In a possible implementation, the single-slope ADC described above includes a counter 1;

[0098] The single-slope analog-to-digital converter calibration system of the embodiment of the present application can also be shown in Figure 7a and Figure 7b, including:

[0100] The single ramp analog-to-digital converter calibration is specifically described below:

[0102] Enter the single-slope ADC calibration mode, and clear the successive approximation register 1 and the successive approximation register 2 to zero.

[0103] First perform offset calibration: S_offset, S2, S3, S5, S7, and S9 are turned off, and S_gain, S1, ...

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Abstract

The embodiment of the present application provides a single-slope analog-to-digital converter calibration method and system, which obtains the lower limit number and the median number of the preset digital output range of the single-slope ADC to be corrected, and obtains the preset voltage-to-analog conversion range of the single-slope ADC to be corrected The lower limit voltage and the median voltage of the lower limit voltage, where the lower limit number is not zero; input the lower limit voltage into the single slope ADC to be corrected, adjust the offset calibration value of the single slope ADC to be corrected, so that the digital output of the single slope ADC to be corrected is the lower limit number, and the offset calibration value at this time is obtained as the target offset calibration value; input the median voltage into the single-slope ADC to be corrected, perform offset calibration on the single-slope ADC to be corrected based on the target offset calibration value, and adjust the Correct the gain calibration value of the single-slope ADC so that the number output by the single-slope ADC to be corrected is the median number, and the gain calibration value at this time is the target gain calibration value. Calibration for single-slope ADCs is implemented.

Description

Single-slope analog-to-digital converter calibration method and system technical field The application relates to the technical field of analog signal processing, particularly relates to a single-slope analog-to-digital converter calibration method and system system. Background technique In the field of integrated circuits, single-slope ADC (Analog to Digital Converter, analog-to-digital converter) is Its advantages of simple structure and low cost are widely used in on-chip digital signal processing, such as various detectors and sensors. device. The operating principle of a single-slope ADC is shown in Figure 1. The ramp generator outputs a ramp signal with a specific slope at a certain time, the The signal is compared with the analog input signal. When the ramp signal is less than the analog input signal, the comparator outputs a high level. When the slope signal is greater than the analog input signal, the comparator outputs a low level, which generates a hig...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/10
CPCH03M1/1028
Inventor 吴梦施何佳刘俊
Owner HANGZHOU HIKMICRO SENSING TECH CO LTD