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High-strength bonding structure with special groove and preparation method of high-strength bonding structure

A bonding structure and high-strength technology, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as high production cost, chip failure, solder overflow, etc., to improve bonding strength and prevent phase Short-circuit between adjacent metals and prevent solder overflow

Inactive Publication Date: 2021-10-15
NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, most of the wafer-level deposition methods of alloy solder have relatively high production costs. Therefore, the current mainstream solder bonding scheme is to deposit low-melting point metals such as Sn and In on the wafer. The temperature and pressure provided by the bonding process make Low melting point metals and other high melting point metals, such as Au, Cu, etc., undergo intermetallic diffusion to form intermetallic compounds with higher remelting temperatures
However, in the three-dimensional integrated microsystem, the wafer often has a peculiar surface morphology, and the process used is also slightly different from the traditional semiconductor process. The bonded wafers completed by the above method often have low strength and serious solder overflow. It not only increases the risk of fragmentation in the subsequent process, but also the risk of chip failure such as short circuit caused by solder overflow

Method used

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  • High-strength bonding structure with special groove and preparation method of high-strength bonding structure
  • High-strength bonding structure with special groove and preparation method of high-strength bonding structure
  • High-strength bonding structure with special groove and preparation method of high-strength bonding structure

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preparation example Construction

[0029] refer to figure 1 , the preparation method of the high-strength bonding structure comprises the following steps:

[0030] Step 1, provide a silicon substrate material 1, photolithographic patterning is carried out on the substrate, and a groove structure 2 with a special shape is produced after dry etching and deglue, and the groove structure 2 is a rectangular groove Groove array 41 is made up of rectangular annular sealing groove 42, such as Figure 5 shown;

[0031] In step 2, a composite dielectric film of silicon nitride and silicon oxide is fabricated on the trench structure 2 by means of plasma-enhanced chemical vapor deposition, and the composite dielectric layer 3 is obtained after photolithographic patterning and dry etching. 3 After metal deposition, photolithographic patterning, and wet etching, the first metal layer 4 used for bonding is obtained, such as figure 2 shown;

[0032] Step 4, providing another silicon substrate material 21, on which a compo...

Embodiment 1

[0036] The preparation method of the groove-containing high-strength bonding structure of this embodiment includes the following steps:

[0037] Step 1, provide a silicon substrate material 1, the silicon substrate material is (100) type silicon, after photolithographic patterning and dry etching on the substrate, a groove structure 2 with a special shape is produced, the groove The groove structure 2 is composed of a rectangular groove array 41 and a rectangular annular sealing groove 42, wherein the length of the rectangular groove is 300um, the width is 5um, the interval between adjacent grooves is 15um, and the groove depth is 3um; the width of the rectangular annular sealing groove is 10um, 15um away from the rectangular trench array;

[0038] Step 2, successively deposit composite dielectric film layers 3 of silicon nitride and silicon oxide on the special trench structure 2. The composite dielectric film is formed by the growth method of plasma enhanced chemical vapor d...

Embodiment 2

[0042] The preparation method of the groove-containing high-strength bonding structure of this embodiment includes the following steps:

[0043]Step 1, provide a silicon substrate material 1, the silicon substrate material is (100) type silicon, after photolithographic patterning and dry etching on the substrate, a groove structure 2 with a special shape is produced, the groove The groove structure 2 is composed of a rectangular groove array 41 and a rectangular annular sealing groove 42, wherein the length of the rectangular groove is 500um, the width is 10um, the interval between adjacent grooves is 15um, and the groove depth is 2um; the width of the rectangular annular sealing groove is 15um, 30um away from the rectangular trench array;

[0044] Step 2, successively deposit composite dielectric film layers 3 of silicon nitride and silicon oxide on the special trench structure 2. The composite dielectric film is formed by the growth method of plasma enhanced chemical vapor d...

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Abstract

The invention discloses a high-strength bonding structure with a special groove and a preparation method of the high-strength bonding structure. The preparation method comprises the following steps: manufacturing a groove type bonding structure on a silicon-based substrate by adopting a dry etching technology; and then depositing adhesion layer metal and bonding layer metal on the groove structure, and carrying out wafer-level bonding on the adhesion layer metal and the bonding layer metal on the other silicon-based substrate so as to realize high-strength bonding between wafers. According to the method, the failure risk generated in the chip stacking process due to low bonding strength is avoided, and a wafer-level stacking solution can be provided for a three-dimensional integrated microsystem.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer-level bonding structure and a preparation method thereof. Background technique [0002] The bonding process based on solder system is a wafer-level bonding technology widely used in the field of semiconductor manufacturing. By making metal solder for bonding between bonded wafers, the bonding process is completed at a temperature not higher than 300°C to achieve high-reliability, high-strength bonding between wafers, providing a three-dimensional integrated microsystem Efficient and reliable wafer-level stacking solution. At present, the main solders used are AuSn, AgSn, AgIn and other solders. In comparison, AuSn solder has higher structural strength and better creep resistance. [0003] However, most of the wafer-level deposition methods of alloy solder have relatively high production costs. Therefore, the current mainstream solder bonding scheme i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/488H01L21/60
CPCH01L24/29H01L24/32H01L24/27H01L24/83H01L2224/29011H01L2224/29139H01L2224/29144H01L2224/29147H01L2224/29111H01L2224/29109H01L2224/3207H01L2224/27
Inventor 吴焱刘鹏飞史芝纲王雷郁元卫朱健
Owner NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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