Manufacturing method of transistor, transistor, basic memory cell and dynamic random access memory

Abstract

The invention provides a manufacturing method of a transistor, the transistor, a basic memory cell and a dynamic random access memory. The method comprises the following steps of forming a conductive channel, wherein the conductive channel comprises a columnar body and end portions on the two sides, and at least one of the end portions is arranged in a protruding mode, forming a gate insulating layer surrounding the columnar body, and exposing the end portions of the two sides of the conductive channel, forming a gate electrode surrounding the gate insulating layer, and forming a source electrode and a drain electrode at the end portions of the two sides of the conductive channel. The transistor is improved from a horizontal transistor in the prior art to a vertical transistor, so that the area occupied by a single transistor in the horizontal direction is reduced, the number of transistors in unit area is increased, and the density of the transistors is improved.

Description

technical field [0001] The invention relates to the field of semiconductor technology, in particular to a method for manufacturing a transistor, a transistor, a basic storage unit, and a dynamic random access memory. Background technique [0002] Basic unit of dynamic random access memory as attached Figure 1A shown, and by attaching Figure 1B The array structure shown forms a memory. The basic unit is often referred to as a 1T1C structure. Among them, 1T, the transistor, mainly has attached Figure 2A The planar transistor and attached Figure 2B Two structures of buried channel array transistors are shown. For the transistors of these two structures, the source and the drain are distributed on both sides of the horizontal plane direction of the gate, so that the area occupied by the transistor in the horizontal direction is relatively large. [0003] Because the bit line and the storage device of the dynamic random access memory are connected to one of the source / dr...

AI Technical Summary

Problems solved by technology

[0003] Since the bit line and the storage device of the dynamic random access memory are connected to one of the source / drain respectively, the transistors of these two structures are used to make the memory, and the bit line and the storage device capacitor are located on the same side of the gate. In terms of processing technology, they are all located on the same side of the wafer, so that the overall process complexity is high, especially for photolithography and related processes, which have extremely high requirements, process control is difficult, and the failure rate is high.

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