High-density intelligent network card, FPGA and working method thereof

Abstract

The invention discloses a high-density intelligent network card, which comprises an FPGA, a network port, a PCIE interface, SOC equipment and an SODIMM memory. The FPGA is used for receiving a memory access request from the SOC equipment and a memory access request from the network port, distinguishing the memory access request from the SOC equipment and the memory access request from the network port, sending the memory access request from the SOC equipment to the SODIMM memory, and obtaining request data and feeding back the request data to the SOC equipment. Therefore, compared with a traditional intelligent network card architecture, the memory of the FPGA and the memory of the SOC equipment are pooled, the space of hardware on a board card is saved, the hardware design is simplified, and the hardware design efficiency is improved. In addition, the invention further provides the FPGA applied to the high-density intelligent network card and a working method of the FPGA in the high-density intelligent network card, and the technical effects of the FPGA and the working method correspond to the technical effects of the high-density intelligent network card.

Description

technical field [0001] The present application relates to the field of computer technology, in particular to a high-density smart network card, an FPGA applied to the high-density smart network card, and a working method of the FPGA in the high-density smart network card. Background technique [0002] With the development of data center network architecture, in order to solve the problem of network traffic resource consumption caused by data center virtualization, the concept of smart network card came into being. SmartNICs free up valuable computing resources in servers by offloading network traffic between virtual machines on the server to the NIC. [0003] The current mainstream smart network card architecture is realized through SOC+FPGA, such as figure 1 As shown, the FPGA provides external service channels through a network port. The FPGA is interconnected with the upstream device through a PCIE interface. A set of DRAM memory is set under the FPGA, and the FPGA and t...

AI Technical Summary

Problems solved by technology

However, the hardware design requires a lot of hardware space, which limits its further development for the limited network card space.

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