Delay modulation method based on ferroelectric transistor

Abstract

The invention provides a delay modulation method based on a ferroelectric transistor, and belongs to the field of neural network accelerators. According to the method, a time-delay modulation unit circuit is constructed and comprises a phase inverter structure composed of a ferroelectric transistor, an N-type MOSFET and a P-type MOSFET, wherein the drain end of the FeFET is connected to the source end of an NMOS (N-channel Metal Oxide Semiconductor) in the phase inverter, and the source end of the FeFET is connected to a GND (Ground); during programming operation, the gate end of the FeFET receives programming voltage pulses higher than the coercive voltage of the ferroelectric layer, the threshold voltage of the device is adjusted through ferroelectric polarization overturning, and weight programming is achieved. During local multiplication calculation operation, the grid end of the FeFET is biased at the voltage representing the input of the neural network in a non-destructive reading mode, the initial calculation pulse acts on the input end of the phase inverter of the delay modulation unit, and the delay time of the output pulse relative to the input pulse is the result of local multiplication calculation. According to the invention, the hardware overhead can be obviously reduced, and the realization of a large-scale time domain neural network accelerator chip is facilitated.

Description

technical field [0001] The invention relates to a neural network accelerator, in particular to a delay modulation method based on a ferroelectric transistor. Background technique [0002] With the vigorous development of information technology, human society has entered the era of "data explosion", and the annual exponential growth of data volume has brought unprecedented pressure on data processing and calculation. Due to the characteristics of the traditional von Neumann computing architecture, which separates storage and computing, the transmission of data between the storage unit and the computing unit will cause a lot of waste of power consumption and energy consumption. In today's information society and even the intelligent society, there is a huge amount of data In this context, this problem will become more and more serious. [0003] Inspired by the computing model of the human brain, the researchers proposed a neural network (Neural Network) computing architecture...

AI Technical Summary

Problems solved by technology

At present, there are only SRAM-based time-domain calculation delay modulation units. They need additional current-limiting circuits or adjustable capacitor modules to realize the multiplication operation in vector-matrix point multiplication, resulting in high hardware costs and power consumption.

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