Resistive random access memory and preparation method thereof
A technology of resistive memory and resistive layer, which is applied in ion implantation plating, gaseous chemical plating, coating and other directions, can solve the problem that the resistance window cannot be further improved, and achieves reduction of production cost, simple preparation process, and increased production cost. The effect of large resistance
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Embodiment 1
[0037] Such as figure 1 As shown, this embodiment includes a resistive variable memory, including: a substrate; a lower electrode, the lower electrode is connected to the substrate; a resistive layer, the resistive layer is connected to the lower electrode; an upper electrode, the upper electrode is connected to the resistive The layers are connected, and the resistance switch layer is arranged between the lower electrode and the upper electrode.
[0038] The resistive switch layer includes a first metal oxide layer, a second metal oxide layer and a storage window layer, the first metal oxide layer is respectively connected to the lower electrode and the second metal oxide layer, and the second metal oxide layer is respectively connected to the The first metal oxide layer is connected to the storage window layer, and the storage window layer is respectively connected to the upper electrode and the second metal oxide layer.
[0039] The material of the first metal oxide layer ...
Embodiment 2
[0046] Such as figure 2 As shown, this embodiment includes a method for preparing a resistive variable memory, including the following steps: selecting a silicon wafer as a substrate and cleaning it, depositing and forming a lower electrode on the substrate; depositing and forming a resistive variable layer on the lower electrode, The resistive layer is sequentially fabricated with a first metal oxide layer, a second metal oxide layer and a storage window layer;
[0047] The upper electrode is deposited on the storage window layer; the pattern of the lower electrode, the resistive layer and the upper electrode is processed by photolithography technology, and the multiple resistive memories composed of the lower electrode, the resistive layer and the upper electrode are isolated from each other.
[0048] Specifically, in this embodiment, a silicon wafer with silicon oxide can be selected as the substrate and cleaned, wherein the silicon oxide is used as an isolation layer for ...
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