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HDL code simulation coverage rate asynchronous event-driven automatic analysis method

An asynchronous event, automatic analysis technology, applied in software testing/debugging, instrumentation, electrical digital data processing, etc., can solve problems affecting simulation performance, etc.

Pending Publication Date: 2022-03-29
湖南泛联新安信息科技有限公司
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

[0004] In view of this, the present invention proposes an asynchronous event-driven automatic analysis method for HDL code simulation coverage, to overcome the problem that the HDL code instrumentation measures the code structure coverage and affects the simulation performance, and the method will not affect the original circuit function. accomplish

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  • HDL code simulation coverage rate asynchronous event-driven automatic analysis method
  • HDL code simulation coverage rate asynchronous event-driven automatic analysis method
  • HDL code simulation coverage rate asynchronous event-driven automatic analysis method

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Embodiment Construction

[0032] In order to understand the above-mentioned purpose, features and advantages of the present invention more clearly, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that, in the case of no conflict, the embodiments of the present application and the features in the embodiments can be combined with each other.

[0033] Specifically, an asynchronous event-driven automatic analysis method for HDL code simulation coverage proposed by a specific embodiment of the present invention, such as Figure 1-2 shown, including the following steps:

[0034] S1, Lexical syntax analysis of HDL code;

[0035] Lexical and grammatical analysis is to do lexical and grammatical analysis on HDL (Hardware Description Language, Verilog HDL and VHDL), including:

[0036] S11, write the lexical rules of HDL code, utilize the Flex software tool to generate the C program source code of lexical...

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Abstract

The invention discloses an HDL code simulation coverage rate asynchronous event-driven automatic analysis method. The method comprises the following steps: performing lexical and grammatical analysis on an HDL code; initializing a coverage rate analysis environment; inserting coverage rate primitives; an executable function corresponding to the coverage rate primitive is generated, and then the executable function is inserted into an event queue of the coverage engine to serve as an independent thread or process to be maintained; the executable function and the simulation program are executed asynchronously in parallel to collect coverage rate information; and outputting a coverage rate analysis result and a report. According to the method, the executable function corresponding to the coverage rate primitive is inserted into the event queue of the coverage engine and is executed in parallel and asynchronously with the simulation process, so that the realization of the original circuit function is not influenced, and the influence on the simulation performance can be minimized.

Description

technical field [0001] The invention relates to the technical field of computer program testing, in particular to an asynchronous event-driven automatic analysis method for HDL code simulation coverage. Background technique [0002] With the continuous expansion of the scale of integrated circuits, circuits at the level of 100 million gates have become the mainstream of today's IC (Integrated Circuit, microelectronic device) design. Functional verification runs through the entire process from IC design to tape-out. The loss caused by functional verification is huge, so functional verification is facing great challenges. The mainstream of the IC design industry uses HDL (Hardware Description Language, hardware description language) to describe the circuit design, and then uses the HDL language to describe the test signal stimulus, jointly compile the circuit design and stimulus into a simulation program and execute it to obtain the simulation waveform to verify the functional...

Claims

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Application Information

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IPC IPC(8): G06F11/36
CPCG06F11/3676G06F11/3692
Inventor 戴延军
Owner 湖南泛联新安信息科技有限公司
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