Semiconductor structure, preparation method thereof and semiconductor device
A semiconductor and device technology, applied in the field of semiconductor structure and its preparation method, and semiconductor devices, can solve the problems that the step coverage cannot be adjusted, and the top and bottom of the non-conformal film have differences, etc.
Pending Publication Date: 2022-04-12
INST OF MICROELECTRONICS CHINESE ACAD OF SCI +1
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[0003] The object of the present invention is to provide a kind of semiconductor structure, the top and the bottom of trench in this semiconductor structure have been through different chemical treatment, make the thickness of trench top and bottom joint silicon film be different because of the speed difference of silicon nucleation, therefore The resulting non-conformal film has differences at the top and bottom of the trench, which solves the problem that the step coverage cannot be adjusted in the prior art
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[0022] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present disclosure.
[0023] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for clarity of presentation. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, ...
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The invention relates to a semiconductor structure, a preparation method thereof and a semiconductor device. A semiconductor structure comprises a semiconductor substrate which is provided with an active region and a groove; the bottom surface of the groove contains an oxygen plasma processing layer; the top surface of the groove contains a hydrogen ion treatment layer; and a non-conformal silicon film is formed from the top surface of the groove containing the hydrogen ion processing layer to the bottom surface of the groove containing the oxygen plasma processing layer. According to the invention, different chemical treatments are carried out on the top and the bottom of the groove, so that the thicknesses of the silicon films combined with the top and the bottom of the groove are different due to different silicon nucleation speeds, and therefore, the finally formed non-conformal films are different at the top and the bottom of the groove, and the problem that the step coverage rate cannot be adjusted in the prior art is solved.
Description
technical field [0001] The invention relates to the field of semiconductor preparation, in particular to a semiconductor structure, a preparation method thereof and a semiconductor device. Background technique [0002] With the miniaturization of electronic equipment, DRAM (Dynamic Random Access Memory, DRAM) is an important component. In the active manufacturing process, if the active sidewall oxidation is directly performed after etching the trench, Thinning of the active region will occur, which will lead to poor subsequent processes, such as reduced contact area on the active region. In order to improve this phenomenon, such as figure 1 As shown, after etching the trench, deposit amorphous silicon, and then perform a subsequent oxidation process to prevent the problem of thinning the top of the active region. In the above process, at present, amorphous silicon is directly deposited on the surface of the trench, so that the step coverage cannot be adjusted, that is, the...
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IPC IPC(8): H01L27/108H01L27/11524H01L27/11551H01L27/1157H01L27/11578H01L21/205H10B12/00H10B41/20H10B41/35H10B43/20H10B43/35
Inventor 李相遇李俊杰周娜
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI