Modeling method of field effect transistor

Abstract

The invention discloses a modeling method of a field effect transistor, which comprises the following steps: establishing a small signal intrinsic part equivalent circuit of an FET (Field Effect Transistor), and obtaining a relationship between an internal intrinsic parameter and an external bias; constructing a large signal model of the FET, wherein the large signal model comprises a gate charge source, a drain charge source, a gate current source, a drain current source and an NQS sub-circuit; performing path integration on the port voltage to obtain a relation among the nonlinear current source, the charge source and the port voltage; and then a neural network analysis model can be obtained through storage in a lookup table mode or through neural network training. In the integration process of the current source and the charge source, the NQS effect is completely eliminated, the modeling mode is consistent with the physical mechanism of the NQS, unification of a small signal model and a large signal model is ensured, the precision of the model is not influenced by a frequency band, a high-order source does not need to be used, and in terms of robustness and precision of the model and the difficulty of model extraction, the modeling efficiency is greatly improved. And the model framework is obviously superior to the existing model framework.

Description

technical field [0001] The application relates to a field effect transistor (FET), in particular to a modeling method of the field effect transistor, which belongs to the field of integrated circuit design. Background technique [0002] In the 21st century, the information industry is developing rapidly. In just 20 years, the communication standard has spanned from 2G to 3G, 4G, and now to 5G. High capacity and low latency are the core of 5G communication, and high frequency and high power amplifier is one of the keys to achieve these two goals. As we all know, the distributed effects of high-frequency chips and the electromagnetic and thermal effects introduced by packaging make chip design and debugging extremely complicated. Therefore, the design process based on EDA (Electronic Design Automation) is extremely critical, and an accurate transistor RF nonlinear model is the key. The most complex and important part of a process. [0003] There are several types of RF trans...

AI Technical Summary

Problems solved by technology

In some literatures, high-order current sources and charge sources are used to describe the NQS phenomenon, but some problems will be encountered in actual operation, such as the non-conservation of high-order current and charge sources, and incomplete test data. The environment has not been promoted on a large scale

Images