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Method for accurately guiding growth of high-uniformity diameter nanowires

A nanowire and precise technology, applied in the field of microelectronics, can solve problems such as disordered guidance and uneven thickness of nanowires, and achieve the effect of avoiding disorderly growth

Pending Publication Date: 2022-04-26
NANJING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Aiming at the problems of uneven thickness of nanowires and disordered guidance in the prior art, the present invention provides a preparation method for precisely guiding and growing nanowires with high uniform diameters

Method used

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  • Method for accurately guiding growth of high-uniformity diameter nanowires
  • Method for accurately guiding growth of high-uniformity diameter nanowires
  • Method for accurately guiding growth of high-uniformity diameter nanowires

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Embodiment 1

[0043] The embodiment of the present application provides a preparation method for precisely guiding the growth of nanowires with high uniform diameter, such as Figure 1a~1n As shown, the method includes:

[0044] The first step is to alternately deposit silicon oxide film layers (A1) and silicon nitride (A2) film layers to form a substrate layer; the thickness of A1 is 30 nm, and the thickness of A2 is 40 nm, forming a stack in the vertical direction Substrate structure such as Figure 1a As shown, its cross-section is shown in Figure 1b shown.

[0045] The second step is to pattern the above substrate layer and etch the sidewall. Hydrofluoric acid etches the A1 layer to make it concave inwards to form a trench. The structure formed by this step is as follows Figure 1c As shown, its cross-section is shown in Figure 1d shown.

[0046] In the third step, the catalytic metal In is deposited on one side of the trench to form a structure such as Figure 1e As shown, the...

specific Embodiment approach 2

[0052] The embodiment of the present application provides a preparation method for precisely guiding the growth of nanowires with high uniform diameter, such as Figure 2a~2g As shown, the method includes:

[0053] In the first step, the SiO 2 Or photolithographic patterning on the Si substrate defines the target guide groove, and the development exposes the area where the guide groove needs to be defined; the formed structure is as follows Figure 2a shown.

[0054] In the second step, plasma etching is performed on the region of the target guide groove on the substrate base material layer to obtain a close-packed guide groove in a lateral plane. The structure formed by this step is as follows Figure 2b shown.

[0055] The third step is to guide photolithography on one side of the trench to define the adhesion area of ​​catalytic metal In and deposit catalytic metal particles, forming a structure such as Figure 2c shown.

[0056] In the fourth step, the catalytic meta...

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Abstract

The invention discloses a method for accurately guiding growth of a nanowire with a high-uniformity diameter, which comprises the following steps of: alternately depositing multiple layers of SiO2 and Si3N4 in a vertical direction through PECVD (Plasma Enhanced Chemical Vapor Deposition) to form a longitudinal close-packed stacked structure, and forming a longitudinal side wall guiding groove after plasma etching and acid treatment; or obtaining densely arranged guide grooves in a transverse plane on the substrate through electron beam exposure and etching; depositing an amorphous silicon precursor on the whole substrate sample, wherein the thickness of the amorphous silicon precursor is greater than the depth of the guide groove or greater than the depth of the densely arranged guide groove so as to form better precursor coverage; and etching the amorphous silicon precursor on the surface and the side wall of the guide groove or the densely-arranged guide groove through a plasma etching technology, and only reserving the amorphous silicon precursor in the guide groove or the guide groove.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a method for precisely guiding and growing nanowires with high uniform diameters. Background technique [0002] Crystalline silicon semiconductor nanowires have become the core material of modern microelectronics technology because of their high carrier mobility and the advantages of efficient, stable and reliable doping process. As the size of devices continues to shrink, changing the arrangement of silicon nanowire transistors from planar to three-dimensional stacking is an important direction for the future development of semiconductor devices. Compared with the traditional silicon wafer etching process, the method of growing integrated silicon nanowire channel materials [R Hu, et al.NanoLett. 2020, 20, 7489−7497] is due to the low reaction temperature and the substrate The selectivity is low, and it has great application prospects in the preparation of back-end devi...

Claims

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Application Information

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IPC IPC(8): H01L29/06B82Y30/00B82Y40/00
CPCH01L29/0669B82Y30/00B82Y40/00
Inventor 余林蔚程银子刘宗光梁逸飞胡瑞金王军转
Owner NANJING UNIV