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Photoresist layer removing method and semiconductor device manufacturing method

A technology of photoresist layer removal and manufacturing method, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve serious cross-diffusion, increase of feature size of implanted area, and influence of static random access memory Electrical performance and other issues, to achieve the effect of simple operation, improvement of electrical performance, and elimination of photoresist residue

Active Publication Date: 2022-04-29
NEXCHIP SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the feature size in the photoresist layer is directly adjusted, or the exposure conditions are adjusted, the feature size of the implanted area will increase unpredictably, making the cross-diffusion of the adjacent areas of NMOS and PMOS more serious, thus affecting the static random memory. Take the electrical performance of the memory

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  • Photoresist layer removing method and semiconductor device manufacturing method
  • Photoresist layer removing method and semiconductor device manufacturing method
  • Photoresist layer removing method and semiconductor device manufacturing method

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Embodiment Construction

[0050] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0051] It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, so that only the components related to the present invention are shown in the diagrams rather than the number, shape and Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual implementation, and the component layout may also be ...

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Abstract

The invention provides a photoresist layer removing method and a manufacturing method of a semiconductor device. The photoresist layer removing method comprises the following steps: providing a semiconductor layer; forming an anti-reflection layer on the semiconductor layer; forming a photoresist layer on the anti-reflection layer; etching the light resistance layer and the anti-reflection layer to form the patterned light resistance layer and the patterned anti-reflection layer; implanting ions into the semiconductor layer by taking the photoresist layer and the anti-reflection layer as masks; and removing the light resistance layer and the anti-reflection layer. Through the photoresist layer removing method and the semiconductor device manufacturing method provided by the invention, the problem of photoresist residue can be solved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for removing a photoresist layer and a method for manufacturing a semiconductor device. Background technique [0002] Static Random-Access Memory (SRAM) is an integrated semiconductor device. In the manufacturing process of SRAM, after N-type ion and P-type ion implantation or etching, when the photoresist needs to be removed, At the bottom of the photoresist, there will be photoresist residue due to the corner structure. Residual photoresist will affect the active area, thereby affecting the effect of ion implantation. And after implanting N-type ions and P-type ions, there will be cross-diffusion in adjacent regions of NMOS and PMOS. If the feature size in the photoresist layer is directly adjusted, or the exposure conditions are adjusted, the feature size of the implanted area will increase unpredictably, making the cross-diffusion of the adjacent areas of NM...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/027H01L21/266H01L21/8244H01L27/11H10B10/00
CPCH01L21/0272H01L21/266H10B10/00
Inventor 宋富冉周儒领黄厚恒
Owner NEXCHIP SEMICON CO LTD
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