Integrated circuit digital back-end eco method, system and computer storage medium

A kind of integrated circuit and digital technology, applied in the field of system and computer storage medium, integrated circuit digital back-end ECO method, to achieve the effect of reducing cost, high accuracy and improving efficiency

Active Publication Date: 2022-07-08
NANJING QINHENG MICROELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Purpose of the invention: In order to solve the problem that in the prior art, when the ECO logic is relatively complex, it is impossible to quickly and efficiently complete the multiplexing of the original first metal layer and the first via layer to reduce the number of modified layers in the ECO process and improve the ECO efficiency, the present invention provides an integrated circuit digital back-end ECO method, system and computer storage medium

Method used

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  • Integrated circuit digital back-end eco method, system and computer storage medium
  • Integrated circuit digital back-end eco method, system and computer storage medium
  • Integrated circuit digital back-end eco method, system and computer storage medium

Examples

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Embodiment 1

[0038] This embodiment provides an integrated circuit digital back-end ECO method, such as Image 6 , including the following steps:

[0039] The back-end design tool reads the netlist after the logical ECO (also called functional ECO, which means that the logical relationship has changed) into the original design database, and obtains the pins that need to be connected and the original connection relationship of the pins. The original connection relationship of the pin can be obtained by the original line net name of the pin. The pins that need to be connected are formed into a pin list, and the original line net name of the pin is formed into the original line net name list. The net names of the original lines in the net name list correspond one by one, and according to a pin, the net name of the original line corresponding to the pin can be found;

[0040] The back-end design tool changes the pins that need to be changed in the original design database and the original lin...

Embodiment 2

[0062] The difference between the second embodiment and the first embodiment is that in the integrated circuit digital back-end ECO method provided in the second embodiment, in the step of changing the original line net name of the renaming object of the pin to the new line net name, The central area is determined according to the pin attributes, and the central area is a polygonal area. The polygonal area is determined according to the coordinates of many points on the pin boundary, and the determined polygonal area is the area where the pins are located.

[0063] The reasons for providing these two embodiments are briefly explained here. In the first embodiment, the two diagonal coordinate points of the pins are used to determine the rectangular area. In order to directly use the existing design tools to determine the positions of the pins, the first embodiment The back-end design tools can continue the existing design tools as much as possible, and add other functions on thi...

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Abstract

The invention discloses an integrated circuit digital back-end ECO method, system and computer storage medium. The method includes a back-end design tool obtaining a pin list and an original line net name list according to an original design database and a netlist after the logical ECO; The back-end design tool changes the pins that need to be changed in the original design database and the original line net names of the renaming objects of the pins to the new line net names according to the netlist after the logical ECO, and obtains a new design database. Rename objects include metal shapes and vias; get new design database; perform ECO routing. The invention can quickly and efficiently realize the multiplexing of the first metal layer and the first via layer, thereby reducing the number of ECO layers to change, improving the efficiency of the ECO, and assisting in reducing the cost of the ECO, and is not limited by the complexity of the chip, High accuracy, especially suitable for scenarios with complex chips, many pins, and complex connection logic.

Description

technical field [0001] The invention belongs to the technical field of design automation EDA in the integrated circuit design industry, and particularly relates to an integrated circuit digital back-end ECO method, a system and a computer storage medium. Background technique [0002] With the increasing scale of integrated circuits, many designs have reached millions of gates. Although many logic analysis, simulation and FPGA test verification are carried out before tape-out, it is still difficult to cover all functional combinations. Some functional bugs will be found, at this time, ECO (Engineering Change Order, engineering modification) is required to solve. ECO means that the underlying physical unit of the layout is not changed after tape-out. Some spare cells are used, and only the wiring of the metal layer is changed to change the connection, so as to achieve the purpose of repairing the logic function. Compared to re-tape, ECO's method has a shorter cycle time and i...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/327G06F30/394
CPCG06F30/327G06F30/394
Inventor 冯科磊
Owner NANJING QINHENG MICROELECTRONICS CO LTD
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