Power semiconductor device and electronic equipment

Abstract

The invention provides a power semiconductor device and electronic equipment, the power semiconductor device comprises an epitaxial layer and two field effect transistors, the epitaxial layer is provided with a groove, and the two field effect transistors are in mirror symmetry. Each field effect transistor includes a first MOS structure and a second MOS structure connected in series. The first channel of the first MOS structure and the second channel of the second MOS structure are arranged at intervals along the depth direction of the groove; and the first grid electrode of the first MOS structure and the second grid electrode of the second MOS structure are arranged at an interval along the depth direction of the groove. According to the technical scheme, the first grid electrode and the second grid electrode are longitudinally arranged in the depth direction of the groove, so that the transverse occupied size of the field effect transistor is reduced. The first MOS structure and the second MOS structure share the drift region, the resistance of the drift region is reduced, and the unit area characteristic conduction resistance of the power semiconductor device is reduced through symmetrical back-to-back parallel connection of the two same field effect transistors.

Description

technical field [0001] The present application relates to the field of circuit technology, and in particular, to a power semiconductor device and electronic equipment. Background technique [0002] With the development of power integrated circuits and equipment towards miniaturization, as one of the core electronics of power integrated circuits, power semiconductor devices also show the development requirements of high integration, miniaturization, high performance and low cost. For example, as the core components of battery management and charging system protection circuits in electronic equipment, power semiconductor devices can effectively protect batteries and charging loads from over-discharging, over-shooting, and over-current, and achieve output short-circuit protection. [0003] The power semiconductor device in the battery management and charging system protection circuit is a switching device mainly composed of a metal oxide semiconductor field effect transistor (M...

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Problems solved by technology

[0005] When the above-mentioned power semiconductor device is turned on, the current flows through the drift region and the primary substrate 4 in the epitaxial layer 3 twice on the route, and the drift region resistance of the epitaxial layer 3 and the substrate resistance of the substrate 4 increase the overall power. The on-resistance of semiconductor devices, and as the size of metal-oxide-semiconductor field-effect transistors continues to shrink, the ratio of the resistance of the drift region and the substrate to the total resistance also increases. In addition, the gate 1, source 2 and other structures are set in The surface of the epitaxial layer is arranged horizontally, resulting in a waste of the chip area of ​​the power semiconductor device, which further increases the characteristic conduction per unit area of ​​the device and the cost per unit area, making it difficult to miniaturize the power semiconductor device. Under the same device area, it will increase battery management. And charging system protection circuit loss and temperature rise, reducing charging efficiency

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