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High-linearity broadband input buffer realized based on bootstrap capacitor

An input buffer, high linearity technology, applied in field effect transistor reliability improvement, logic circuit, pulse technology, etc., can solve the problem of linearity deterioration of parasitic capacitance of the device, change of buffer bandwidth, change of drain current, etc. , to achieve the effect of reducing output impedance, constant drain-source voltage, and improving linearity

Pending Publication Date: 2022-06-28
西安电子科技大学重庆集成电路创新研究院
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But the disadvantage is: as the input changes, the drain current will also change, resulting in changes in parameters such as Gm and Res, resulting in non-ideal effects, that is, nonlinear effects
[0008] Therefore, the traditional input buffer has problems such as the decrease of linearity with the change of input under large signal, the bandwidth of the buffer itself will change with the input, and the parasitic capacitance of the device will deteriorate the linearity and so on.

Method used

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  • High-linearity broadband input buffer realized based on bootstrap capacitor
  • High-linearity broadband input buffer realized based on bootstrap capacitor
  • High-linearity broadband input buffer realized based on bootstrap capacitor

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Embodiment Construction

[0020] The present invention will be described in further detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0021] like figure 2 As shown, a high linearity wideband input buffer based on a bootstrap capacitor provided by the present invention includes:

[0022] switchΦ s , the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor CL, the resistor R1, the first MOS transistor M1, the second MOS transistor M2, the third MOS transistor M3, the fourth MOS transistor M4, the fifth MOS tube M5 and sixth MOS tube M6;

[0023] The power supply high voltage VDDH is respectively connected to one end of the resistor R1 and the drain of the first MOS transistor M1, and the other end of the resistor R1 is connected to the negative end of the first capacitor C1 and the gate of the first MOS transistor M1; the positive end of the first capacitor C1 It is connected to the posi...

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Abstract

The invention provides a broadband high-linearity input signal buffer based on a bootstrap capacitor, which is composed of an extraction capacitor C3 technology, an input tube M2 based on a bootstrap capacitor C1 and an alternating-current floating resistor R technology, and a low-output-impedance cascode structure. The capacitor C3 adopting the extraction capacitor technology can compensate the slew rate of the input signal buffer during high-frequency large-amplitude forward input, and the aim of improving the linearity is achieved. Meanwhile, the output impedance of the input buffer can be reduced through the low-output-impedance cascode structure, it is guaranteed that drain-source voltage of an input tube is constant based on the bootstrap capacitor and alternating-current floating resistor technology, the channel length modulation effect is eliminated, and therefore the overall performance of the digital-to-analog converter ADC can be improved.

Description

technical field [0001] The invention belongs to the field of integrated circuit design, and in particular relates to a high linearity wideband input buffer based on a bootstrap capacitor. Background technique [0002] With the development of integrated circuits, the market demands more and more high-speed and high-precision analog-to-digital converters. The front-end sample-and-hold circuits of high-speed, high-precision analog-to-digital converters require wider input bandwidths than at low frequencies, making circuit design increasingly challenging. [0003] traditional input buffers such as figure 1 As shown, implemented by source trackers, these buffers have high input impedance and low output impedance. These features isolate kickback noise caused by sampling switching, reduce load-induced nonlinearity, and provide greater bandwidth. But the disadvantage is: as the input changes, the drain current will also change, resulting in changes in parameters such as Gm, Res, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/0185H03K19/003
CPCH03K19/018507H03K19/00315
Inventor 刘术彬安泽帅韩昊霖丁瑞雪朱樟明
Owner 西安电子科技大学重庆集成电路创新研究院