Read-write separated 12T TFET SRAM unit circuit
A unit circuit, read-write separation technology, applied in information storage, static memory, digital memory information and other directions, can solve problems such as hindering the application of low-power devices, increasing SRAM static power consumption, reducing static power consumption, etc. Noise Tolerance and Write Capability, Eliminate Forward Bias Leakage Current Leakage, Reduce Static Power Consumption
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[0033] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. It does not constitute a limitation of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.
[0034] like figure 1 Shown is a schematic diagram of the overall structure of the 12T TFET SRAM cell circuit with read-write separation provided by the embodiment of the present invention. The circuit includes eight NTFET transistors and four PTFET transistors. The PTFET transistors are recorded as P1 to P4 in turn, where:
[0035] The power supply VDD is electrically connected to the...
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