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Magnetic random access memory

A technology of random access memory and magnetoresistive device, which is applied in the direction of static memory, digital memory information, information storage, etc., and can solve the problem of writing errors in large-capacity wiring reliability, insufficient reduction of wiring current density, Problems such as narrow width

Inactive Publication Date: 2005-06-15
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0027] As described above, in order to prevent the occurrence of electron migration and improve the reliability of the wiring, for example, measures to thicken the wiring have been considered, but this measure is not sufficient for reducing the current density of the wiring. To prevent write errors in unselected cells, the thickness of the wiring must be formed as thin as possible, so that the intensity distribution of the magnetic field generated by the current flowing on the wiring becomes a steep distribution with as narrow a width as possible.
[0028] That is, in the conventional MRAM, it is impossible to realize the increase in storage capacity by miniaturization of the memory cell, the improvement of the reliability of the wiring, and the prevention of writing errors at the same time.

Method used

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  • Magnetic random access memory

Examples

Experimental program
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Embodiment 1

[0045] figure 2 The main part of the magnetic random access memory as Embodiment 1 of the present invention is shown.

[0046] At the end of the memory cell array 11 in the row direction, a row decoder 12 is arranged. Row address signals RA0-RAn are input to row decoder 12 . Row decoder 12 enters an active state when write word line enable signal WWLEN or read word line enable signal RWLEN becomes enabled.

[0047] At the time of writing, row decoder 12 selects a write word line (row) WWL of memory cell array 11 based on row address signals RA0-RAn. The write word line WWL is used to make the magnetization directions of the two magnetic layers of the memory cell parallel or antiparallel together with the bit line BL to be described later. The WWL driver 13 functions to drive the selected write word line WWL.

[0048] The controller 17 enters the active state when the write word line enable signal WWLEN is in the enabled state. The controller 17 can be constituted by, for ...

Embodiment 2

[0109] Magnetic random access memory (MRAM) can perform random writing to any bit in the memory cell array. Here, as a method for increasing the writing bandwidth, for example, a method of fixing a row address and then writing to a memory cell located at the intersection of a row specified by the row address and a plurality of columns is known.

[0110] In MRAM, it is not preferable to simultaneously perform a write operation on all of a plurality of columns in order to increase a write current, since insufficient peak current supply and adverse effects such as radiation of electromagnetic waves may occur.

[0111] In this case, for example, the column selection signal CSLi for selecting a column is sequentially input with a time shift, and the data writing to the memory cell is performed one column at a time, without writing to all of the plurality of columns at the same time. into action.

[0112] here, by Figure 10 It can be seen from the star-shaped curve of , that in t...

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Abstract

In the MRAM, a current having a high current density flows on the wire during a write operation. When writing to a memory cell located at the intersection of the write word line (WWL0) and the bit line (BL0), current flows from the WWL driver (13) toward the buck converter (20). After that, a current in the opposite direction to the current direction during the write operation, that is, a current from the buck converter (20) to the WWL driver (13) flows on the write word line (WWL0). The same is true for the bit lines ( BL0 , BL1 ), for example, after the address operation, a current in a direction opposite to the direction of the current flowing in the bit lines ( BL0 , BL1 ) during the address operation flows.

Description

technical field [0001] The present invention relates to a magnetic random access memory, and more particularly to a method for improving the reliability of a circuit in which a large current flows during writing. Background technique [0002] In recent years, as the phenomenon that the Magnetic Tunnel Junction (MTJ) has a large magnetoresistance ratio (Magneto-Resistive (MR) Ratio) at room temperature has been discovered by researchers, the application of tunneling magnetoresistance effect (Tunneling Magneto- Resistive (TMR)) MRAM realization, began to become a reality. [0003] Even before applying the TMR effect to the MRAM, people have already known the MRAM using the giant magnetoresistance effect (Giant Magneto-Resistive (GMR)). However, the MR ratio of MRAM to which the GMR effect is applied starts from a few percent and is about 10% at most. In addition, in the MRAM using the GMR effect, since a current flows in a low-resistance metal thin film, there is a problem t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/14G11C11/15H01L21/8246H01L27/105H01L43/08
CPCG11C11/15G11C11/1693
Inventor 伊藤洋
Owner KK TOSHIBA