Semiconductor substrate, field effect transistor, and method for forming silicon germanide layer

Abstract

A semiconductor substrate, a field effect transistor, a method of forming a SiGe layer and a method of forming a strained Si layer using the same, and a method of manufacturing a field effect transistor are provided, which enable the threading dislocation density of the SiGe layer to be reduced and the surface roughness to be minimized. On top of a Si substrate 1 is provided a SiGe buffer layer 2, 12 constructed of a plurality of laminated layers comprising alternating layers of a SiGe gradient composition layer 2a, 12a in which the Ge composition ratio increases gradually from the Ge composition ratio of the base material, and a SiGe constant composition layer 2b, 12b which is provided on top of the gradient composition layer and in which the Ge composition ratio is equal to that of the upper surface of the gradient composition layer.

Description

Technical field [0001] The present invention relates to a method for forming a SiGe layer suitable for forming semiconductor substrates, field effect transistors, and deformed Si layers used in high-speed MOSFETs and the like, and a method for forming a deformed Si layer and a method for manufacturing a field effect transistor using the method. Background technique [0002] In recent years, high-speed MOSFETs, MODFETs, and HEMTs using a deformed Si layer epitaxially grown on a Si (silicon) wafer via a SiGe (silicon germanium) layer as a channel region have been proposed. In this deformed Si-FET, SiGe, which has a larger lattice constant than Si, generates tensile deformation in the Si layer. Therefore, the band structure of Si is changed to release degeneracy, and carrier mobility is improved. Therefore, by using this deformed Si layer as a channel region, it is possible to achieve a speed increase of about 1.5 to 8 times that of normal. In addition, a normal Si substrate using t...

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Problems solved by technology

[0007] For example, in the case of using a buffer layer in which the composition ratio of Ge is changed, although the threading dislocation density can be greatly reduced, there is a disadvantage in that the surface roughness is deteriorated. In this case, although the surface roughness can be greatly reduced, there is a disadvantage that the threading dislocation density becomes larger

In addition, in the case of using an offset dicing wafer, although the dislocation disappears not in the film-forming direction but in the lateral direction, sufficient reduction of the dislocation cannot be achieved.

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